Oleblue
5日前
Broadcom Stock Called 'Top Pick.' Here's Why.
PATRICK SEITZ
Updated 04:43 PM ET 07/02/2025
A Wall Street analyst on Wednesday named Broadcom (AVGO) stock as his "top pick" among semiconductor stocks. Even with its recent rise, Broadcom still has room to run, he said.
Mizuho Securities analyst Vijay Rakesh reiterated his outperform rating on Broadcom stock with a price target of 310.
On the stock market today, Broadcom stock advanced 2% to close at 269.90.
The Palo Alto, Calif.-based company is benefiting from AI-driven tailwinds for its networking and custom ASIC chip businesses, Rakesh said in a client note.
"We see the biggest catalyst for (Broadcom) as further AI ASIC ramps," Rakesh said.
The company is making application-specific integrated circuits (ASICs) for artificial intelligence applications for Alphabet (GOOGL) unit Google, Facebook parent Meta Platforms (META) and TikTok parent ByteDance.
Also, Broadcom has been in talks to develop AI chips for Apple (AAPL), OpenAI and two other potential customers, Rakesh said.
While Broadcom stock is his top pick among chip stocks, Rakesh named Nvidia (NVDA) and Micron Technology (MU) as his second and third picks, respectively. Those two companies also are profiting from the AI data center buildout.
On June 3, Broadcom stock broke out of a 24-week consolidation pattern at a buy point of 251.88, according to IBD MarketSurge charts. On Monday, it hit an all-time high of 277.71.
Broadcom stock is on two IBD lists: Leaderboard and Tech Leaders.
Weekly Chart
doc2016
1週前
how to use the tomahawk6? helping samsung make the 3nm gaa chips? and in texas and maybe for apple?
from gemini ai and my prompting:"what is the problem with the gaa yields samsung is experiencing? is it the alignment of the gates are allowing excessive leakage?
Show thinking
This experimental model uses your Search history. Some features aren't available.
I will use the Google Search tool to investigate if gate alignment and leakage are the primary reasons for Samsung's GAA yield problems.
I will use the Google Search tool to perform a more focused search on whether gate misalignment and leakage are the primary reasons for Samsung's GAA yield problems.
While GAA technology is inherently designed to reduce leakage compared to FinFET by providing better gate control, some reports suggest that leakage might still be a contributing factor to Samsung's lower yields at the 3nm node.
However, it's likely not solely due to simple gate misalignment. The challenges are more complex and stem from the newness and intricacies of the GAA architecture at such a small scale. Here's a more nuanced perspective based on the search results:
GAA Aim to Reduce Leakage: GAA's fundamental design, where the gate surrounds the channel on all four sides, is intended to improve electrostatic control and thus minimize current leakage when the transistor is off (the "short-channel effect" that becomes prominent at smaller nodes).
Potential for New Issues: Moving to a completely new architecture like GAA can introduce unforeseen manufacturing challenges. For example, the Reddit discussion mentioned potential variations in the thickness of the silicon ribbons used in Samsung's GAA implementation, which could affect the electrical characteristics of the transistors, potentially including leakage.
Overall Process Complexity: The entire fabrication process for 3nm GAA is significantly more complex than for FinFET. Any slight variations or imperfections during the numerous steps involved can lead to lower yields, and excessive leakage could be a symptom of these broader challenges rather than solely due to gate misalignment.
Power Efficiency as a Broader Issue: Some reports also highlight that Samsung's 3nm process has faced challenges not only in yield but also in power efficiency compared to TSMC, which could be linked to leakage or other factors affecting transistor performance.
In conclusion, while GAA is designed to combat leakage, it's plausible that Samsung's specific implementation or the complexities of the 3nm manufacturing process are still leading to some issues with leakage, among other factors, which contribute to the lower yield rates compared to more mature processes or competitors.
Sources
how are the gaa gates created? aligning the depressions for the channels to be surrounded 360 degrees?
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This experimental model uses your Search history. Some features aren't available.
I will use the Google Search tool to find information on how GAA gates are created and channels are aligned in the process.
Creating the GAA (Gate-All-Around) gates and aligning the depressions for the channels to achieve a 360-degree surround is a complex process involving several key steps:
General Steps for Nanosheet GAA (Samsung's approach with MBCFET):
Epitaxial Growth of Si/SiGe Layers: The process typically begins with the alternating epitaxial growth of thin layers of silicon (Si) and silicon germanium (SiGe) on a silicon wafer. The number of layers determines how many nanosheets will be stacked in the final transistor.
Pillar Definition: These layered structures are then patterned and etched to create vertical pillars. The dimensions of these pillars will define the eventual width and spacing of the nanosheets.
Inner Spacer Formation: An indentation is created in the SiGe layers, which makes room for an inner spacer material to be deposited later. This spacer will be between the source/drain regions and the area where the gate will be formed, defining the gate length.
SiGe Removal (Channel Release): A selective etching process is used to remove the SiGe layers, leaving behind the horizontally stacked silicon nanosheets suspended between the source and drain regions. This is how the channels are formed, with space above and below (and on the sides) them.
Gate Oxide and Gate Material Deposition: A thin layer of gate oxide (an insulator) is conformally deposited around the suspended nanosheets. Following this, the gate material (typically a metal) is also deposited to surround the nanosheets on all sides (top, bottom, and both sides). This creates the "all-around" gate.
Source and Drain Formation: Source and drain regions are then formed on either side of the gate, making contact with the ends of the nanosheets.
Key aspects of alignment for the 360-degree surround:
Precise Lithography: Advanced lithography techniques (like EUV lithography for leading-edge nodes) are crucial for accurately patterning the initial Si/SiGe pillars and for defining the gate dimensions later in the process. This ensures the gate material is positioned correctly to surround the channels.
Conformal Deposition: The deposition of the gate oxide and gate material needs to be highly conformal, meaning it coats all surfaces evenly, including the top, bottom, and sides of the suspended nanosheets, to achieve the full 360-degree surround. Techniques like Atomic Layer Deposition (ALD) are often used for this due to their excellent conformality and thickness control.
Selective Etching: The selective removal of the SiGe layers without damaging the silicon nanosheets is critical for creating the free-standing channels that the gate will then surround. The precision of this etching process is vital for the proper formation and alignment of the channels.
Spacer Definition: The inner spacer formation step helps define the gate length and ensures the gate material doesn't inadvertently short the source and drain regions. This contributes to the proper alignment and isolation of the gate.
Essentially, the 360-degree surround is achieved through a carefully orchestrated sequence of precise material deposition and removal techniques, leveraging advanced lithography for accurate patterning and conformal deposition methods to ensure the gate material encloses the channels from all directions.
Sources
and when they deconstruct the successful and the unsuccessful gaa chips what is their findings in the failure chips?
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This experimental model uses your Search history. Some features aren't available.
I will use the Google Search tool to find information about the findings from the deconstruction of unsuccessful GAA chips manufactured by Samsung.
Based on the information I've found, the findings from the deconstruction of unsuccessful GAA chips made by Samsung likely point to a combination of factors, which are common challenges in advanced semiconductor manufacturing, especially when adopting a new architecture like GAA at the 3nm node. Here's a summary of potential findings:
Physical Defects: These can occur at various stages of the manufacturing process. Examples include particles on the wafer surface, chipping or scratches, or defects within the silicon or deposited layers. In GAA, issues with the precise formation and stacking of nanosheets or nanowires could lead to defects that cause failure.
Buried Defects: These are defects that are not apparent on the surface and can be difficult to detect with standard inspection tools. These could include lattice voids or dislocations within the silicon material that affect the transistor's electrical properties.
Electrical Defects: These relate to the functionality of the transistors. Potential issues include:
Leakage Current: While GAA is designed to reduce leakage, inconsistencies in the manufacturing process, such as variations in the channel dimensions or gate oxide integrity, could still lead to higher than acceptable leakage in some chips.
Threshold Voltage Variations: If the gate's ability to control the channel current is not uniform across the wafer or even within a single chip, it can lead to functional failures. Misalignment, as you suggested, could contribute to this, but it's likely one of many potential factors.
Contact Resistance Issues: Ensuring good electrical contact between the source/drain regions and the channels is crucial. Problems here can lead to reduced performance or outright failure.
Process Variations: Achieving uniformity across an entire wafer at the 3nm scale with a novel architecture like GAA is extremely challenging. Variations in etching rates, deposition thicknesses, or doping concentrations can all lead to chips that fall outside of acceptable performance parameters.
Heat Dissipation Issues: With the increased density of transistors in GAA chips, managing heat becomes critical. Failures could occur due to hotspots or thermal breakdown if the heat isn't effectively dissipated.
It's important to note that the specific findings from Samsung's internal failure analysis are likely proprietary and not publicly detailed. However, the issues listed above represent the general types of challenges faced when manufacturing advanced semiconductor chips with new technologies, and they are likely contributing to the yield problems Samsung is experiencing with their 3nm GAA process.
Sources
do they use realtime video monitoring of these nano scaled processes to try to improve quality of manufacturing?
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This experimental model uses your Search history. Some features aren't available.
I will use the Google Search tool to investigate the use of real-time video monitoring in nanoscale semiconductor manufacturing.
While the concept of real-time monitoring for improving manufacturing quality is definitely relevant in semiconductor fabrication, using standard "video" for processes at the nanoscale (like those involved in 3nm GAA chip production) has significant limitations due to the resolution of visible light.
Here's a more nuanced perspective:
Machine Vision for Inspection: Machine vision systems, which use cameras and software to analyze images, are employed in semiconductor manufacturing for defect detection and quality control at various stages. These systems can capture and process images to identify flaws.
Resolution Limits: Traditional optical microscopy, which is the basis of standard video imaging, has a resolution limit of around 200-250 nanometers laterally. Features in 3nm chip manufacturing are far smaller than this, so standard video microscopy would not be able to provide detailed real-time monitoring of the actual fabrication processes at that level.
Advanced Metrology Techniques: At the nanoscale, semiconductor manufacturing relies on highly advanced metrology tools that go beyond simple optical methods. These include techniques like scanning electron microscopy (SEM), atomic force microscopy (AFM), and X-ray metrology, which can provide the necessary resolution but often involve complex and time-consuming measurements that may not be suitable for continuous real-time video monitoring of the entire process.
Nanotechnology-Enabled Sensors: There is a push towards using nanotechnology-enabled sensors that can provide real-time data and insights into the fabrication processes at a very fine level, including contamination detection and process parameter monitoring. These sensors provide data that can be used for process optimization in real-time, but they don't necessarily produce the kind of visual "video" that we might typically think of.
In summary: While video and imaging techniques are used in semiconductor fabrication for inspection and quality control, directly monitoring the nanoscale processes involved in building GAA chips in real-time using standard video is limited by optical resolution. More advanced sensing technologies and metrology techniques are employed to ensure the quality of these incredibly intricate manufacturing steps.
Sources
could the avgo tomahawk6 switch help in the realtime quality control and inspection process of gaa chips?
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This experimental model uses your Search history. Some features aren't available.
While the Broadcom Tomahawk 6 switch isn't directly involved in the physical inspection of GAA chips, its capabilities could potentially be very beneficial in supporting the real-time data transfer aspects of a sophisticated quality control and inspection process. Here's how:
High Bandwidth: The Tomahawk 6 switch offers extremely high bandwidth (102.4 Tbps). The inspection of nanoscale semiconductor processes like GAA chip manufacturing generates massive amounts of data from advanced metrology tools (e.g., high-resolution microscopy, sensors). This high bandwidth could facilitate the rapid transfer of this data from inspection equipment to analysis and processing units without bottlenecks.
Low Latency: Real-time quality control demands minimal delays in data acquisition and processing to enable immediate feedback and adjustments to the manufacturing line. The low latency of the Tomahawk 6 switch would help ensure that the inspection data is transferred with very little delay, supporting a truly real-time monitoring system.
Data Center Infrastructure: Semiconductor manufacturing plants, especially those dealing with leading-edge technologies, often have complex data center infrastructure to handle the massive amounts of data generated. The Tomahawk 6, being a data center-class switch, is designed for this type of environment and could integrate well into the existing network to support high-speed data movement for quality control purposes.
In summary: The Tomahawk 6 switch, with its focus on high bandwidth and low latency for data-intensive applications, could play a crucial role in building the high-speed data network required to support advanced, real-time quality control and inspection processes for GAA chips. It would facilitate the rapid transfer of large datasets from inspection tools to processing and analysis systems, enabling faster identification of defects and quicker adjustments to the manufacturing process."
Oleblue
1週前
Jefferies Raises Broadcom Price Target to $315: 19% Upside Ahead
Leo Miller
Written by Leo Miller | Reviewed by Shannon Tokheim
July 2, 2025
Timisoara, Romania - April 05, 2020: Close-up of a Broadcom BCM6358KFBG network controller. Electronic components.
A Jefferies analyst didn't think their $300 price target on Broadcom was enough. They now think shares could exceed this mark by $15.
Networking chip relationships could buoy Broadcom's hopes of converting potential ASIC customers. This is key to unlocking the next rally.
Tomahawk 6 is Broadcom's latest innovation that investors shouldn't sleep on as data center needs shift.
Broadcom NASDAQ: AVGO just got a new price target that signals significant upside ahead for the stock. On Monday, Blayne Curtis of Jefferies reiterated his buy rating on the chip giant and boosted his price target from $300 to $315. As of the July 1 close, Broadcom trades at just under $265 per share.
Meanwhile, the MarketBeat consensus price target on Broadcom is just over $281. This average target implies only around 6% upside in shares. However, Curtis is significantly more optimistic. His new target suggests Broadcom could rise three times more, implying nearly 19% upside.
One key part of Curtis’s analysis stands out when it comes to the possibility of Broadcom stock eclipsing the $300 mark.
Broadcom’s AI Chips: How Networking Can Help Lead the Stock to New Highs
Broadcom’s application-specific integrated circuits (ASICs) and networking chips make up its all-important AI semiconductor business line. ASICs are the chips that Broadcom develops for AI training and inference workloads. They are competitors and complements to NVIDIA’s NASDAQ: NVDA ever-popular graphics processing units (GPUs), depending on the context.
ASIC sales are what the market really looks at when deciding whether to upgrade or downgrade Broadcom. Meanwhile, Broadcom makes networking chips for AI data center switches and routers. Switches and routers control the flow of information between different AI data center components. Tomahawk and Jericho are the company’s flagship networking chip families.
The exciting aspect of Curtis’s analysis is these networking chips. It is well known that Broadcom currently has three hyperscale customers and four potential ones for its ASIC business. These current and potential customers account for the seven that Curtis cites.
However, Curtis mentions that five of these hyperscalers are already networking customers. If Curtis is right, this information significantly boosts Broadcom’s overall upside.
To push shares to new highs, markets want to see Broadcom convert its potential ASIC customers to actual ones. The fact that Broadcom didn’t make an announcement like this last quarter is a large reason why shares sold off post-Q2 earnings.
Curtis’s analysis indicates that multiple of Broadcom’s potential ASIC customers are already networking customers. This existing relationship increases the likelihood that they will also become ASIC customers. Thus, the idea that Broadcom shares can move higher based on potential ASIC customer conversion is more likely to play out.
Tomahawk 6: Broadcom’s Unsung Growth Engine
The link between ASIC customer conversion and networking chips is particularly important now. This is because of the recent launch of Broadcom’s Tomahawk 6 networking chip. A Tomahawk 6 chip can facilitate the transfer of twice as much data as any other. This allows Broadcom to capitalize on a trend it is seeing in networking.
Data centers are increasingly shifting toward Broadcom’s Ethernet technology to support "scale-up" architecture. This is where servers become denser, packing more computing power into the same amount of space.
Tomahawk 6’s industry-leading bandwidth makes it ideally positioned to serve this need. Doubling the bandwidth means that users can connect twice the number of components to it without sacrificing performance. This allows for a denser server architecture (scale up), which is the exact opportunity that Broadcom is seeing.
Additionally, the prowess of Tomahawk 6 could increase Broadcom’s potential to cross-sell ASICs. In this way, Tomahawk 6 positions Broadcom to increase networking revenue and gain ASIC customer.
Broadcom Stock Forecast Details
Curtis’s analysis points to one key fact: investors should not overlook the networking piece of Broadcom’s AI chip revenue. Networking chips accounted for 40% of total AI revenue last quarter. Sales of these chips grew by 170% last quarter, more than three times the 46% growth rate of total AI semiconductor revenue.
Importantly, this brisk growth rate came before Tomahawk 6 was even available. Overall, Broadcom has multiple avenues through which it can continue to grow impressively, whether it be ASICs, networking, or VMware. The company is clearly confident in its future. It spent over $4.2 billion on buybacks last quarter, the second-highest amount of quarterly repurchase spending in its history.
With leading tech and the chance to gain big new customers, Broadcom shares could hit $315.
https://www.marketbeat.com/originals/jefferies-raises-broadcom-price-target-to-315-19-upside-ahead/
Weekly Chart
doc2016
2週前
how can amsc contribute to the granular control of wind turbines with the new avgo tomahawk6 switch?
gemini ai says,
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This experimental model uses your Search history. Some features aren't available.
While there's no direct mention of AMSC specifically using the Avago Tomahawk 6 switch in the search results, we can infer how a high-performance switch like the Tomahawk 6 could potentially contribute to the granular control of wind turbines in conjunction with AMSC's technologies:
High-Bandwidth and Low-Latency Data Communication: The Avago Tomahawk 6 switch offers extremely high bandwidth (102.4 Tbps) and low latency. Modern wind turbines and wind farms are equipped with numerous sensors collecting vast amounts of data in real-time regarding wind speed, direction, blade angle, generator performance, temperature, and more. Granular control relies on the rapid and reliable transmission of this data between sensors, controllers (like AMSC's electric pitch systems), and potentially a central control system. The Tomahawk 6 could provide the necessary high-speed network infrastructure to handle this massive data flow efficiently.
Real-Time Control and Coordination: Granular control of wind turbines often involves making rapid adjustments to individual turbine components (like blade pitch) or coordinating the operation of multiple turbines within a wind farm to optimize overall energy capture and grid stability. The low latency of the Tomahawk 6 switch would be crucial for enabling near real-time communication and control signals within the wind farm's network, allowing for more precise and responsive adjustments.
Advanced Networking for Complex Control Algorithms: AMSC's software solutions for wind turbine and wind park control likely employ complex algorithms to optimize performance and manage assets. These algorithms might require the exchange of large datasets or the implementation of sophisticated communication patterns across the wind farm. A high-performance switch like the Tomahawk 6 could support these advanced networking requirements, enabling more intricate and effective control strategies.
Scalability for Large Wind Farms: As wind farms grow in size, the amount of data to be processed and the complexity of control systems increase. The Tomahawk 6's ability to support large-scale networks could provide the scalability needed for implementing granular control across numerous wind turbines within a large wind farm.
In summary, while there's no direct link in the provided search results, the advanced capabilities of the Avago Tomahawk 6 switch in terms of bandwidth and latency could significantly enhance the underlying communication infrastructure required for AMSC's sophisticated wind turbine control systems to achieve more granular and real-time control over individual turbines and entire wind farms. This improved infrastructure could lead to optimized energy capture, increased reliability, and better integration with the power grid.
doc2016
4月前
gemini ai said,"can neural ray tracing of nvidia be used in weighting vectors of quantum spins?
The intersection of NVIDIA's neural ray tracing and quantum spin weighting vectors is a very advanced and emerging area. While a direct, widespread application might still be in development, there are conceptual connections and potential future uses. Here's a breakdown:
Understanding the Concepts:
NVIDIA Neural Ray Tracing:
This technology uses AI, particularly neural networks, to accelerate and enhance ray tracing, a rendering technique that simulates light behavior.
It allows for more realistic and efficient rendering of complex scenes by using AI to predict and approximate light paths.
Quantum Spin Weighting Vectors:
In quantum computing, spin qubits (using the spin of electrons) are a type of qubit.
"Weighting vectors" would refer to the mathematical representations of the probabilities of those spins being in certain states.
Controlling and manipulating these weighting vectors is crucial for performing quantum computations.
Potential Connections and Applications:
Quantum Simulation:
One of the most promising applications of quantum computing is the simulation of complex physical systems.
Ray tracing, at its core, is also a simulation of light behavior.
There's potential for NVIDIA's neural ray tracing technology to be adapted to visualize and analyze the results of quantum simulations, including those involving spin systems.
Essentially, neural ray tracing could be used to create visual representations of the probability distributions of quantum spin states.
Optimization of Quantum Control:
Controlling quantum spins is a very challenging task.
Neural networks, like those used in NVIDIA's ray tracing, are excellent at optimization problems.
It's conceivable that neural networks could be used to optimize the control signals that manipulate quantum spin weighting vectors.
Visualization of Quantum Data:
Quantum data is often very abstract and difficult to interpret.
Neural rendering techniques could be used to create more intuitive visualizations of quantum data, potentially aiding in the development of quantum algorithms.
Key Considerations:
This is a very cutting-edge area, and practical applications are still emerging.
The computational demands of both neural ray tracing and quantum computing are very high.
There is a large amount of ongoing research within both of these fields.
In essence, while not a common application today, there are conceptual overlaps that point to potential future uses of NVIDIA's neural ray tracing in the analysis and visualization of quantum spin systems."
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