Cadence Design Sys Dl 01【0HS2】銘柄情報

Cadence Design Sys Dl 01 (0HS2) 銘柄情報

個人投資家向けのプロ仕様のツール。

プレミアム

通貨

42.01

( - )

買値

42.01

売値

42.01

出来高

257

0.00 日の範囲 0.00

42.01 52 週間の範囲 42.01

時価総額

11.587B

前日終値

42.01

始値

時刻

387.83

(O)

最終取引時間

財務取引量

VWAP

平均取引量 (3 か月)

US$ 2,382,572

発行済株式数

275,816,000

配当利回り

PER

87.68

1 株当たり利益 (EPS)

4.29

歳入

5.53B

純利益

1.17B

Cadence Design Systems, Inc. develops computational, AI-driven software, hardware, and silicon intellectual property products and solutions. The company offers functional verification services, such as Jasper, a formal verification platform; Xcelium, a parallel logic simulation platform; Verisium, a... Cadence Design Systems, Inc. develops computational, AI-driven software, hardware, and silicon intellectual property products and solutions. The company offers functional verification services, such as Jasper, a formal verification platform; Xcelium, a parallel logic simulation platform; Verisium, a generative AI solution; Palladium, an enterprise emulation platform; and Protium, a prototyping platform for chip verification, as well as digital IC design and sign off products, including In novus platform; and custom IC design and simulation product include Virtuoso, a platform to design and verify analog. It also provides Xcelium logic simulator and other front-end verification and virtual prototyping technologies; controllers and physical interfaces; PCI Express, universal accelerator and compute express links, and multiple memory interfaces; and Ten Silica, a digital signal processor. In addition, the company’s design IP portfolio includes serializer/deserializer, peripheral component interconnect, USB, and other standard protocols; and Secure-IC, a solution for embedded security IP. Additionally, it provides System Design and Analysis (SD&A) platform, a solution that enables end-to-end system-level design and verification across chips, packages, PCBs, and electronic systems; Allegro X and Orca X platforms for PCB and advanced packaging; Sigrity X for signal and power integrity; AIR for RF design; Fidelity for computational fluid dynamics; Celsius for thermal and airflow analysis; Clarity 3D solver for electromagnetic and power electronics analysis and simulation; Integrity 3D-IC solution for 3D-IC and multi-chiplet designs; the Optimality Intelligent System Explorer, Reality digital twin, and Millennium enterprise multiphasic platforms; Allegro system design platform; and molecular modeling and simulation solutions and services. The company has a strategic collaboration with NVIDIA. The company was incorporated in 1987 and is headquartered in San Jose, California. 詳細を表示

セクター

業界

ウェブサイト

www.cadence.com

本社

San Jose, United States

設立

1987

Cadence Design Sys Dl 01 is listed in the sector of the ロンドン証券取引所 with ticker 0HS2. The last closing price for Cadence Design Sys Dl 01 was US$42.01. Over the last year, Cadence Design Sys Dl 01 shares have traded in a share price range of US$ 42.01 to US$ 42.01.

Cadence Design Sys Dl 01 currently has 275,816,000 shares in issue. The market capitalisation of Cadence Design Sys Dl 01 is US$11.59 billion. Cadence Design Sys Dl 01 has a price to earnings ratio (PE ratio) of 87.68.

表示するニュースはありません。

期間 †	始値	高値	安値	平均出来高	VWAP
1	0	0	0	0	0	DE
4	0	0	0	0	0	DE
12	0	0	0	0	0	DE
26	42.01	42.01	42.01	2928	42.01	DE
52	42.01	42.01	42.01	1783	42.01	DE
156	42.01	42.01	42.01	4696	42.01	DE
260	42.01	42.01	42.01	6138	42.01	DE