Verific’s Front-End Platforms Now Powering AI EDA Startups, Serving as Foundational Technology for a New and Emerging Market
2024年6月20日 - 12:00AM
Verific Design Automation today affirmed its position as the
leading provider of front-end platforms powering an emerging
electronic design automation (EDA) space by collaborating with a
group of well-funded artificial intelligence (AI) EDA startups.
These new AI EDA companies use Verific’s unsurpassed language
support for fast, accurate large language model (LLM) development,
speeding time to market for products that range from functional
verification, chip design to code development.
AI EDA providers PrimisAI and Silimate, founded by former chip
designers, will be in the Verific booth (#1414) AI showcase at the
61st Design Automation Conference (DAC) June 24-26 at Moscone West
in San Francisco.
“This new and exciting market segment is about to change the
entire makeup of the EDA industry,” says Rick Carlson, vice
president of Verific. “We are about to see a variety of tools,
technologies and methodologies destined to change the way chip
design and verification is done.”
Introducing the EDA Startups Ushering in the Era of AI
EDAPrimisAI and Silimate will be showcased in the Verific
DAC booth and present their unique use of AI technology to
eliminate error-prone repetitive tasks for efficient and more
productive chip design.
PrimisAI offers a generative AI solution
for chip design with advanced language-to-code and
language-to-verification capabilities through its interactive AI
assistant to address complex hardware challenges across the entire
design stack from concept to bitstream/GDSII. RapidGPT, unveiled
earlier this year, lets engineers interact with their design and
the entire EDA ecosystem with a natural language interface,
boosting productivity and accelerating time-to-market. Founded by
serial entrepreneur Naveed Sherwani who serves as chairman and CEO,
PrimisAI is backed by two early-stage investors.
“Verific’s front-end platform lived up to its well-earned status
of industry standard as we implemented it in RapidGPT,” remarks
Pierre-Emmanuel Gaillardon, CSO of PrimisAI. “The robustness and
quality of the Verific front-end platform ensured we would deliver
a tool that would give engineers a seamless and efficient
workflow.”
Silimate, backed by Y Combinator, is building
the co-pilot for chip designers to help build better chips faster.
Silimate finds functional bugs, predicts power, performance and
area (PPA) issues, and recommends real and accurate fixes in real
time, and is already being used by chip teams building complex IP
and SoCs. Co-founders Ann Wu and Akash Levy previously built chips
and EDA tools at Apple, Stanford, NVIDIA, and Synopsys.
“Verific consistently produces quality products and offers
exceptional quality support,” comments Wu. “Their parsers are
fantastic and result in very quick tool bring-up times for our
customers.”
Metalware co-founded by Ryan Chow and Andrew
Nedea is another Verific front-end platform user. It was started
with initial funding from Y Combinator with the mission to
accelerate embedded development using AI technology after
personally experiencing repeated bottlenecks in embedded software
at SpaceX. The Metalware AI EDA tools help designers rapidly write
HDL and embedded C/C++ by combining insights from manuals,
datasheets and code, offering 10x faster development by automating
low-level programming.
“Verific embodies our stated goals to reduce the time it takes
to design chips and systems,” affirms Chow. “Verific and its team
of experienced EDA engineers have shown repeatedly that its
front-end platforms enable a project that would normally take days
to be completed in hours.”
Another AI EDA startup in stealth mode is also a new Verific
user. Details will be announced shortly.
DAC AI ShowcaseVerific will demonstrate its
SystemVerilog, Verilog, VHDL and UPF front-end platforms, while
PrimisAI and Silimate will be in the Verific DAC Booth #1414 at
various times of the day to give 10-minute presentations.
DAC will be held from Monday, June 24, through Wednesday, June
26, from 10 a.m. until 6 p.m. at Moscone West in San Francisco.
To arrange a demonstration or private meeting, send email to
info@verific.com
DAC registration is open.
About Verific Design AutomationVerific Design
Automation is the leading provider of SystemVerilog, Verilog, VHDL
and UPF Parser Platforms that enable project groups to develop
advanced electronic design automation (EDA) products quickly and
cost effective worldwide. With offices in Alameda, Calif., and
Kolkata, India, Verific has shipped more than 60,000 copies of its
software used worldwide by the EDA and semiconductor industry since
it was founded in 1999.
Engage with Verific at:Email: info@verific.com
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For more information, contact:Nanette CollinsPublic Relations
for Verific nanette@nvc.com