Synopsys Inc (SNPS)

Synopsys Announces Availability of the First Wave of Multiphysics Fusion SolutionsJune 17, 2026 12:00 PM
PR Newswire (US) Market Leaders Including Cisco, MediaTek, NVIDIA, and Samsung Foundry
Demonstrate Measurable Impact, Advancing the Shift from Overdesign to Co-design Key Highlights Integrates golden signoff multiphysics analysis directly into timing signoff, design closure, multi-die, and analog workflows, enabling earlier, more accurate design decisionsEnables SPICE-accurate multiphysics timing analysis with up to 3x faster runtimesDelivers up to 10x faster design closure with higher ECO success rates and improved PPAProvides concurrent power integrity, electromagnetic, and thermal analysis across dies and packaging, enabling early system-level insights from exploration to signoffSUNNYVALE, Calif., June 17, 2026 /PRNewswire/ -- Synopsys, Inc. (NASDAQ: SNPS) today announced availability of its first Multiphysics Fusion™ solutions for customer deployment. As chip complexity increases, physics-related challenges including signal integrity, power integrity, thermal integrity, electromagnetic effects, and co-packaged optics are becoming critical constraints at advanced nodes and in multi-die architectures, requiring a unified EDA and multiphysics approach. The Multiphysics Fusion portfolio combines Synopsys' AI-powered EDA solutions with Ansys golden signoff analysis across timing signoff, design closure, multi-die design, and analog workflows. Validated by market leaders, these solutions improve predictability and accelerate convergence for AI and high-performance computing systems. "Multiphysics is fundamentally reshaping how advanced semiconductor designs are engineered, driving a shift from costly overdesign to integrated, system-aware co-design," said Sanjay Bali, Senior Vice President of EDA Product Management and Strategy at Synopsys. "Our Multiphysics Fusion portfolio unifies Synopsys and Ansys technologies to embed physics directly into digital and analog workflows, enabling engineering teams to design across domains with fewer iterations, improved productivity and more optimized silicon for next-generation systems."Enabling Multiphysics-Aware Co-Design Across the Chip Design Flow
Building on the vision introduced at Synopsys Converge 2026, the first Multiphysics Fusion solutions include targeted GPU-accelerated flows powered by NVIDIA CUDA-X libraries such as cuDSS:Multiphysics Fusion for Timing Signoff: Enables up to 3x faster runtimes, SPICE-accurate multiphysics timing analysis. Integrates Synopsys PrimeTime® with RedHawk-SC™ and RedHawk-SC Electrothermal™, along with unified full-spectrum RC extraction using Synopsys StarRC™ and multiphysics HFSS-IC, to incorporate IR, thermal, and stress effects, improving margins and reducing IR-induced timing escapes.Multiphysics Fusion for Design Closure: Delivers up to 10x faster design closure with higher engineering change order (ECO) success rates and improved power, performance and area (PPA). Combines Synopsys PrimeClosure™ with RedHawk-SC to embed power integrity into golden signoff optimization, accelerating convergence with fewer iterations.Multiphysics Fusion for Multi-die Designs: Unified Synopsys 3DIC Compiler platform with RedHawk-SC, RedHawk-SC Electrothermal and multiphysics HFSS-IC for concurrent power integrity, thermal, and electromagnetic analysis, providing early system insights from exploration to golden signoff with correct-by-construction design.Multiphysics Fusion for Analog & Photonic Design: Integrates Synopsys Custom Compiler™ with multiphysics HFSS-IC for on-chip, high accuracy electromagnetic analysis into the analog design flow, and Synopsys OptoCompiler with Lumerical enabling end-to-end photonic IC and co-packaged optics systems.Demonstrating Real-World Impact with Market Leaders
Early engagements with leading semiconductor and systems companies validate the value of Multiphysics Fusion solutions:"As multi-die integration becomes increasingly important for high performance compute platforms, it's critical we make the right system-level design decisions early in the development process," said Harrison Hsieh, vice president at MediaTek. "By unifying multiphysics analysis and timing signoff across digital, analog, photonic and multi-die designs, Synopsys Multiphysics Fusion technology gives us earlier insight into cross-domain interactions across silicon, advanced packaging and optical domains, which makes it possible for us to improve predictability, reduce late-stage rework, and achieve a runtime that's 10 times faster than before.""Advanced AI and high-performance computing platforms are pushing chip design beyond traditional workflows, and to deliver greater performance, efficiency and reliability at scale, multiphysics-aware co-design is essential," said Tim Costa, vice president and general manager of computational engineering at NVIDIA. "Synopsys is using NVIDIA accelerated computing and CUDA-X libraries, including cuDSS, which delivers up to 13x GPU acceleration, to scale increasingly complex SPICE simulations, electromagnetics, and power-integrity workloads. In addition, Synopsys Multiphysics Fusion solutions enable up to 5x faster design closure and up to 86% IR fix rates in selected pilot designs.""Accurate timing signoff at advanced nodes requires a unified approach that accounts for IR drop, thermal, and stress effects directly within timing analysis," said Hyung-Ock Kim, vice president and head of the Foundry Design Technology Team at Samsung Electronics. "Synopsys' Multiphysics Fusion technology provides a unified, all-aware timing signoff platform by integrating PrimeTime with multiphysics insight, delivering SPICE-accurate correlation and enabling margin recovery. This is increasingly important as we pursue higher levels of integration, performance, and reliability across advanced process and multi-die technologies."In addition, the Cisco Silicon One group is leveraging Synopsys Multiphysics Fusion technology to unify IR drop effects within signoff design closure to gain earlier, more accurate visibility into real-world conditions. Combined with signoff-accurate, timing-aware IR fixing, this enables predictive optimization—helping Cisco Silicon One converge on power integrity issues faster, deliver better PPA, and achieve significantly faster runtime.Availability
Multiphysics Fusion solutions for timing signoff, design closure, multi-die design, and analog and photonic design are available today. For more information, visit, https://www.synopsys.com/solutions/multiphysics-fusion.html.  ResourcesBlog: From Overdesign to Co-Design: Confronting Multiphysics Challenges in ChipsBlog: New Synopsys Multiphysics Fusion™ Technology Set to Transform Chip and Product EngineeringeBook: Multiphysics Fusion Technology for Multi-Die Designs ExplainedeBook: Optimizing Analog Design with MultiphysicsNews Release: Synopsys Outlines Vision for Engineering the FutureAbout Synopsys
Synopsys, Inc. (Nasdaq: SNPS) is the leader in engineering solutions from silicon to systems, enabling customers to rapidly innovate AI-powered products. We deliver industry-leading silicon design, IP, simulation and analysis solutions, and design services. We partner closely with our customers across a wide range of industries to maximize their R&D capability and productivity, powering innovation today that ignites the ingenuity of tomorrow. Learn more at www.synopsys.com.© 2026 Synopsys, Inc. All rights reserved. Synopsys, Ansys, the Synopsys and Ansys logos, and other Synopsys trademarks are available at https://www.synopsys.com/company/legal/trademarks-brands.html. Other company or product names may be trademarks of their respective owners.Forward-Looking Statements
This press release contains forward-looking statements, including, but not limited to, statements concerning our expectations regarding certain of our solutions, including their anticipated performance and benefits, and the development of additional solutions and enhancements. These statements involve risks, uncertainties and other factors that could cause our actual results, time frames, or achievements to differ materially from those expressed or implied in such forward-looking statements. Information on potential risks, uncertainties and other factors that could affect Synopsys' results is included in filings we make with the SEC from time to time, including in the sections entitled "Risk Factors" in our latest Annual Report on Form 10-K and in our latest Quarterly Report on Form 10-Q.Contacts

Media        Kelli Wheeler
Kelli.wheeler@synopsys.com
corp-pr@synopsys.com  View original content:https://www.prnewswire.com/news-releases/synopsys-announces-availability-of-the-first-wave-of-multiphysics-fusion-solutions-302803203.htmlSOURCE Synopsys, Inc. Original: Synopsys Announces Availability of the First Wave of Multiphysics Fusion Solutions

Synopsys Advances Power and Performance for AI and Multi-Die Designs on Latest Samsung Foundry Processes at SAFE Forum 2026May 28, 2026 1:00 PM
PR Newswire (US) Highlights:New production-ready, AI-powered digital and analog flows are available for second-and third-generation 2nm processes accompanied by an expanded portfolio of certified interface IP, including for Samsung Foundry's automotive nodes.Unique Design Technology Co-Optimization (DTCO) initiatives for synthesis and layout, as well as signoff, are delivering meaningful power, performance, and area (PPA) enhancements.Customers are observing significant test efficiency improvements of up to 20% by leveraging AI-powered, silicon-based design and manufacturing test capabilities validated and deployed in collaboration with Samsung Foundry.SUNNYVALE, Calif., May 28, 2026 /PRNewswire/ -- Synopsys, Inc. (Nasdaq: SNPS) today announced at Samsung Advanced Foundry Ecosystem (SAFE) Forum 2026 its latest collaborations with Samsung Foundry on advanced nodes, including an expanded portfolio of production-ready, AI-powered EDA tools, certified interface IP, and silicon-based test capabilities, enabling customers to bring differentiated AI and multi-die designs to market faster and with measurably improved quality. During his keynote at the event, Synopsys?President and CEO Sassine Ghazi?underscored the?companies' long-standing collaboration to address compounding semiconductor engineering complexity, intense pressure for faster development cycles, and increasing costs. Ghazi emphasized that overcoming these challenges requires a fundamentally new approach where AI driven automation and multiphysics intelligence are fused across the entire design and manufacturing flow. Pointing to initiatives leveraging Synopsys AI-powered solutions and deep design and technology co optimization (DTCO), Ghazi said customers are bringing advanced silicon to market faster, while achieving meaningful gains in PPA and test efficiency, on Samsung Foundry's latest process nodes. "Close alignment across design, test, and manufacturing are critical to the success of AI and multi-die designs on advanced nodes," said Hyung-Ock Kim, vice president and head of the Foundry Design Technology Team at Samsung Electronics. "Our continued close collaboration with Synopsys delivers silicon-based, customer-validated solutions that help our customers reduce design integration risk, improve silicon predictability, and move confidently from design to production for their most innovative solutions.""As designs become more heterogeneous, customers need production-ready, silicon-proven solutions that address complexity and minimize risk from silicon to systems," said Ravi Subramanian, Chief Product Management Officer at Synopsys. "Our work with Samsung Foundry translates years of DTCO and silicon learning into enablement that helps our customers get their advanced designs to market quickly and with confidence."The latest Synopsys and Samsung Foundry collaborations include:New Synopsys Production-Ready Flows and Improved PPA on third-generation 2nm class process: Synopsys AI-powered digital and analog flows are production-ready for third-generation 2nm class process, helping customers migrate to advanced Samsung Foundry nodes with speed and confidence. Through Synopsys and Samsung Foundry's continued DTCO initiatives, Synopsys Fusion Compiler™ on third-generation 2nm class process delivers measurable power and performance improvements validated with customers, compared to second-generation 2nm class process. Silicon-Based Power and Performance Improvements During Signoff with Certified Multiphysics Capabilities: New Synopsys PrimeShield™ Process Sensitivity Analysis and PVT Explorer support design-specific optimization and engineering change order (ECO) decisions during signoff, with demonstrated frequency improvement of up to 2.7% within 5% leakage current degradation respectively, informed by silicon feedback on 2nm class-based processes.1 In addition, Synopsys Totem-SC is a newly certified electromigration (EM) and IR drop analysis solution on second-generation 2nm and 4nm class processes improving silicon design power integrity and reliability.AI-Powered Test Improves Efficiency and Quality of Designs: Synopsys and Samsung Foundry are applying silicon-proven methodologies to design for test (DFT) enablement and manufacturing test to reduce test cost and improve test quality for designs on advanced process nodes. For example, Synopsys TestMAX™ with AI-assisted automatic test pattern generation (ATPG) technologies (TSO.ai) validated and deployed in collaboration with Samsung Foundry teams, help reduce test patterns and test cycles up to 20% while preserving fault coverage on SoC and multi-die designs manufactured at Samsung Foundry. Additionally, physically aware tests and failure diagnosis at the die and multi-die level improve test quality and failure analysis turnaround time with results validated on silicon at Samsung Foundry.Unified Exploration-to-Signoff Platform with Multiphysics Analysis Supporting Samsung's 3DIC Solution with Hybrid Copper Bonding Technology: Synopsys and Samsung Foundry are enabling scalable 3D multi-die designs through certified multiphysics signoff solutions delivered within Synopsys 3DIC Compiler, a unified exploration-to-signoff platform being validated on a Hybrid Copper Bonding (HCB) 3D test chip. The platform brings together planning, implementation, and multiphysics analysis to enable co-optimization across integrated compute, memory, and advanced packaging systems for Samsung's 3DIC solutions with HCB technology. By replacing manual, margin-based approaches with automated, AI-driven system optimization, the platform accelerates designer productivity while enhancing quality of results (QoR) for next-generation 3D AI designs.Expanded IP Portfolio on Advanced and Automotive Nodes Decreases Design Integration Risk: Synopsys offers the industry's broadest portfolio of IP across Samsung Foundry's advanced processes from 14nm, 8nm, and 5nm class processes to the latest titles for 4nm and second-generation 2nm supporting a wide range of applications for segments including high-performance computing, consumer electronics, mobile devices, and edge AI, as well as automotive applications at 5nm and 2nm class processes. Synopsys' broad portfolio of interface IP—including UCIe, PCIe 7.0, 112G/224G, MIPI, LPDDR6, DDR5 MRDIMM Gen2 and USB4, — and foundation IP—including embedded memories, logic libraries, GPIOs, as well as security IP and Silicon Lifecycle Management (SLM)— are optimized through the companies' long-standing collaboration to deliver trusted, low-risk solutions tailored to Samsung's processes to support faster time to market.SAFE Forum 2026 showcases the continued, deep collaboration between Synopsys and Samsung Foundry, driven by companies' shared commitment to co-innovation and customer success at the most advanced nodes.Follow Synopsys online for updates via our Newsroom, on LinkedIn, and on X.Resources:Overview: Synopsys and Samsung CollaborationVideo: Synopsys and Samsung: Delivering Technology Breakthroughs TogetherBlog: Accelerating Multi-Die Innovation with Samsung Foundry1 Compared to a previous version of Synopsys PrimeShield.About Synopsys
Synopsys, Inc. (Nasdaq: SNPS) is the leader in engineering solutions from silicon to systems, enabling customers to rapidly innovate AI-powered products. We deliver industry-leading silicon design, IP, simulation and analysis solutions, and design services. We partner closely with our customers across a wide range of industries to maximize their R&D capability and productivity, powering innovation today that ignites the ingenuity of tomorrow. Learn more at www.synopsys.com. © 2026 Synopsys, Inc. All rights reserved. Synopsys, Ansys, the Synopsys and Ansys logos, and other Synopsys trademarks are available at https://www.synopsys.com/company/legal/trademarks-brands.html. Other company or product names may be trademarks of their respective owners. Contacts
Media
Kelli Wheeler: kelliw@synopsys.com
Pete Smith: pete.smith@synopsys.com
corp-pr@synopsys.com  View original content to download multimedia:https://www.prnewswire.com/news-releases/synopsys-advances-power-and-performance-for-ai-and-multi-die-designs-on-latest-samsung-foundry-processes-at-safe-forum-2026-302784686.htmlSOURCE Synopsys, Inc. Original: Synopsys Advances Power and Performance for AI and Multi-Die Designs on Latest Samsung Foundry Processes at SAFE Forum 2026

Synopsys Posts Financial Results for Second Quarter Fiscal Year 2026May 27, 2026 4:05 PM
PR Newswire (US)  Announces Plan for September 2026 Investor DayResults SummaryQuarterly revenue of $2.276 billion, above prior guidance; quarterly GAAP earnings per diluted share (EPS) of $0.09, and non-GAAP EPS of $3.35Raising expectations for full-year total revenue to $9.665 billion at the midpoint, driven by strong performance across the business and an EPS-neutral Ansys channel-related accounting impact, partly offset by the impending close of the Processor IP Solutions businessRaising full-year non-GAAP EPS guidance to $14.76 at the midpoint on expanded operating margin driven by strong cost discipline and accelerating synergiesSUNNYVALE, Calif., May 27, 2026 /PRNewswire/ -- Synopsys, Inc. (Nasdaq: SNPS) today reported results for its second quarter of fiscal year 2026. Revenue for the second quarter of fiscal year 2026 was $2.276 billion, compared to $1.604 billion for the second quarter of fiscal year 2025. "Synopsys delivered a strong second quarter with solid execution and strength across the business," said Sassine Ghazi, Synopsys president and CEO. "AI is scaling semiconductor demand, architectural diversity and complexity of chips and the systems they power - driving demand across our portfolio. Our momentum, leadership roadmap, and deep customer engagements are a strong foundation for sustained growth and margin expansion as we solve our customers' toughest engineering challenges.""Second quarter revenue and non-GAAP EPS exceeded guidance. Our continued focus on execution and financial discipline sets us up for a strong second half," said Shelagh Glaser, CFO of Synopsys. "We are raising our targets for revenue, operating margin, EPS, and free cash flow for the year, as we drive greater efficiency across the business."The company plans to host an Investor Day on Sept. 30, during which management will provide additional detail regarding the company's long-term financial targets and strategy to capitalize on its sizable opportunity as the leader in engineering solutions from silicon to systems.GAAP Results
On a U.S. generally accepted accounting principles (GAAP) basis, net income for the second quarter of fiscal year 2026 was $17.1 million, or $0.09 per diluted share, compared to $349.2 million, or $2.24 per diluted share, for the second quarter of fiscal year 2025.Non-GAAP Results
On a non-GAAP basis, net income for the second quarter of fiscal year 2026 was $643.7 million, or $3.35 per diluted share, compared to non-GAAP net income of $572.7 million, or $3.67 per diluted share, for the second quarter of fiscal year 2025.For a reconciliation of net income, earnings per diluted share and other measures on a GAAP and non-GAAP basis, see "GAAP to Non-GAAP Reconciliation" in the accompanying tables below.Business Segments 
Synopsys reports revenue and operating income in two segments: (1) Design Automation, which includes our advanced silicon design, verification products and services, Ansys products, system integration products and services, digital, custom and field programmable gate array IC design software, verification software and hardware products, manufacturing software products and other; and (2) Design IP, which includes our logic libraries, embedded memories, wired interface IP, memory interface IP, security IP, and embedded processors.Financial Targets
Synopsys also provided its consolidated financial targets for the third quarter and full fiscal year 2026. These targets assume no further changes to export control restrictions or the current U.S. government "Entity List" restrictions. These targets constitute forward-looking statements and are based on current expectations. For a discussion of factors that could cause actual results to differ materially from these targets, see "Forward-Looking Statements" below.Third Quarter and Full Fiscal Year 2026 Financial Targets(in millions, except per share amounts)






 Range for Three Months
Ending
Range for Fiscal Year
Ending
July 31, 2026
October 31, 2026
LowHigh
LowHighRevenue (1)$         2,410$         2,460
$         9,625$         9,705GAAP Expenses$         2,075$         2,125
$         8,469$         8,599Non-GAAP Expenses$         1,440$         1,470
$         5,675$         5,725Non-GAAP Interest and Other Income (Expense), net$           (121)$           (117)
$           (495)$           (485)Non-GAAP Tax Rate18 %18 %
18 %18 %Outstanding Shares (fully diluted)192194
192194GAAP EPS$           0.84$           0.98
$           2.49$           2.91Non-GAAP EPS$           3.63$           3.69
$         14.72$         14.80Operating Cash Flow


~$2,300Free Cash Flow (2)


~$2,000Capital Expenditures


~$300





(1) Fiscal year 2026 revenue includes $2.96 billion of expected Ansys revenue (including $60 million related to an
accounting impact for Ansys channel partners), and reflects the impact of approximately $110 million of the
divested Optical Solutions Group and PowerArtist RTL businesses, and $40 million related to the expected divestiture of the Processor IP Solutions business. (2) Free cash flow is calculated as cash provided from operating activities less capital expenditures.





Fiscal Year 2026 Revenue Target Raise Breakdown(in millions)





For Fiscal Year EndingOctober 31, 2026
Prior Guidance
Mid-PointBusiness
PerformanceAnsys Channel Accounting
ImpactProcessor IP
Solutions
DivestitureNew Guidance Mid-PointRevenue$9,610+ $35+ $60($40)$9,665For a reconciliation of Synopsys' third quarter and fiscal year 2026 targets, including expenses, earnings per diluted share and other measures on a GAAP and non-GAAP basis, a discussion of the financial targets that we are not able to reconcile without unreasonable efforts and a discussion of why management believes such measurements provide useful information to investors, see "GAAP to Non-GAAP Reconciliation" in the accompanying tables below.Earnings Call Open to Investors
Synopsys will hold a conference call for financial analysts and investors today at 2:00 p.m. Pacific Time. A live webcast of the call will be available in the investor relations portion of Synopsys' corporate website at www.synopsys.com. Synopsys uses its website as a tool to disclose important information about Synopsys and comply with its disclosure obligations under Regulation Fair Disclosure. A webcast replay will also be available on the corporate website from approximately 5:30 p.m. Pacific Time today through the time Synopsys announces its results for the third quarter of fiscal year 2026.Availability of Final Financial Statements
Synopsys will include final financial statements for the second quarter of fiscal year 2026 in its quarterly report on Form 10-Q to be filed with the Securities and Exchange Commission (SEC) and available at www.sec.gov on or before June 9, 2026.Continuing Operations 
On Sept. 30, 2024, Synopsys completed the sale of its Software Integrity business. Unless otherwise noted, Synopsys' Software Integrity business has been presented as a discontinued operation in the Synopsys' consolidated financial statements for all periods presented herein and all financial results and targets are presented herein on a continuing operations basis.Reconciliation of Second Quarter Fiscal Year 2026 Results
The following tables reconcile the specific items excluded from GAAP in the calculation of non-GAAP net income, earnings per diluted share, and tax rate for the periods indicated below.GAAP to Non-GAAP Reconciliation of Second Quarter Fiscal Year 2026 Results(unaudited and in thousands, except per share amounts)








Three Months Ended
Six Months Ended
April 30,
April 30,
2026
2025
2026
2025GAAP net income from continuing operations attributed to
Synopsys$           17,105
$    349,232
$      82,063
$    644,915Adjustments:






Amortization of acquired intangible assets403,631
11,656
807,866
24,252Stock-based compensation222,303
201,723
481,027
388,002Restructuring charges115,894
—
234,176
—Acquisition/divestiture related items23,649
69,514
39,241
144,343Loss on sale of strategic investments—
2,435
—
2,435Tax adjustments(138,848)
(61,862)
(282,170)
(158,076)Non-GAAP net income from continuing operations attributed to
Synopsys$         643,734
$    572,698
$  1,362,203
$  1,045,871
























Three Months Ended
Six Months Ended
April 30,
April 30,
2026
2025
2026
2025GAAP net income from continuing operations per diluted share
attributed to Synopsys$              0.09
$        2.24
$        0.43
$        4.13Adjustments:






Amortization of acquired intangible assets2.10
0.07
4.22
0.16Stock-based compensation1.16
1.29
2.51
2.48Restructuring charges0.60
—
1.22
—Acquisition/divestiture related items0.12
0.45
0.20
0.92Loss on sale of strategic investments—
0.02
—
0.02Tax adjustments(0.72)
(0.40)
(1.47)
(1.02)Non-GAAP net income from continuing operations per diluted
share attributed to Synopsys$              3.35
$        3.67
$        7.11
$        6.69















Shares used in computing net income per diluted share amounts: 192,144
156,088
191,580
156,218















GAAP to Non-GAAP Tax Rate Reconciliation(unaudited)



Three Months EndedSix Months Ended
April 30, 2026April 30, 2026GAAP effective tax rate12.5 %17.0 %Stock-based compensation9.7 %4.7 %Restructuring charges(2.1) %(2.1) %Income tax adjustments (1)(2.1) %(1.6) %Non-GAAP effective tax rate18.0 %18.0 %


(1) The tax adjustments are primarily due to differences in the tax rate effect of certain deductions, such as the
deduction for foreign-derived intangible income and credits.Reconciliation of 2026 Targets
The following tables reconcile the specific items excluded from GAAP in the calculation of non-GAAP targets for the periods indicated below.GAAP to Non-GAAP Reconciliation of Third Quarter Fiscal Year 2026 Targets(in thousands, except per share amounts)









 Range for Three Months Ending

July 31, 2026

Low
HighTarget GAAP expenses
$      2,075,000
$      2,125,000Adjustments:



      Amortization of acquired intangible assets
(400,000)
(405,000)      Stock-based compensation
(230,000)
(240,000)      Restructuring charges
(5,000)
(10,000)Target non-GAAP expenses
$      1,440,000
$      1,470,000














Range for Three Months Ending

July 31, 2026

Low
HighTarget GAAP earnings per diluted share attributed to Synopsys
$             0.84
$             0.98Adjustments:



      Amortization of acquired intangible assets
2.10
2.07      Stock-based compensation
1.24
1.19      Restructuring charges
0.05
0.03      Tax adjustments
(0.60)
(0.58)Target non-GAAP earnings per diluted share attributed to Synopsys
$             3.63
$             3.69




Shares used in non-GAAP calculation (midpoint of target range)
193,000
193,000




GAAP to Non-GAAP Reconciliation of Full Fiscal Year 2026 Targets(in thousands, except per share amounts)









Range for Fiscal Year Ending

October 31, 2026

Low
HighTarget GAAP expenses
$      8,469,241
$      8,599,241Adjustments:



      Amortization of acquired intangible assets
(1,610,000)
(1,620,000)      Stock-based compensation
(945,000)
(965,000)      Restructuring charges
(200,000)
(250,000)      Acquisition/divestiture related items (1)
(39,241)
(39,241)Target non-GAAP expenses
$      5,675,000
$      5,725,000









Range for Fiscal Year Ending

October 31, 2026

Low
HighTarget GAAP earnings per diluted share attributed to Synopsys
$             2.49
$             2.91Adjustments:



      Amortization of acquired intangible assets
8.39
8.34      Stock-based compensation
5.00
4.90      Restructuring charges
1.30
1.04      Acquisition/divestiture related items (1)
0.20
0.20      Tax adjustments
(2.66)
(2.59)Target non-GAAP earnings per diluted share attributed to Synopsys
$           14.72
$           14.80




Shares used in non-GAAP calculation (midpoint of target range)
193,000
193,000




(1)  Adjustments reflect actual expenses incurred by Synopsys as of April 30, 2026, and do not fully reflect all
potential adjustments for future periods for the reasons set forth in "GAAP to Non-GAAP Reconciliation"
below.Forward-Looking Statements
This press release and the investor conference call contain forward-looking statements, including, but not limited to, statements concerning our short-term and long-term financial targets, expectations and objectives; our businesses, business segments, strategies, partnerships, initiatives and opportunities, including, among other things, the reallocation of resources in our Design IP segment to higher growth opportunities and planned restructuring activities; industry growth and technological trends, such as artificial intelligence, including our development and planned commercialization thereof; business and market outlook; the potential impact of the uncertain macroeconomic environment and global economic conditions on our financial results; the impact of current and future U.S. and foreign trade regulations, government actions and regulatory changes, such as export control restrictions and tariffs; the ANSYS, Inc. (Ansys) integration and its expected impact, including expected synergies and the timing thereof, our ability to create joint solutions as a combined company, and related accounting changes; planned acquisitions or divestitures, including the expected completion of the sale of the Processor IP Solutions business, and their anticipated timing and impact; our key customers, customer concentration, customer engagement, customer demand and market expansion; results and strategies related to our products, technology and services, including product development and our planned product releases and capabilities; the expected realization of our contracted but unsatisfied or partially unsatisfied performance obligations (backlog); planned stock repurchases; our expected tax rate; and the status, expected outcome or expected impact of litigation and/or regulatory investigations. These statements involve risks, uncertainties and other factors that could cause our actual results, time frames or achievements to differ materially from those expressed or implied in such forward-looking statements. Such risks, uncertainties and factors include, but are not limited to: macroeconomic conditions and geopolitical uncertainty in the global economy; uncertainty in the growth of the semiconductor and electronics industries; the highly competitive industry we operate in; actions by the U.S. or foreign governments, such as the imposition of additional export restrictions or tariffs; consolidation among our customers and our dependence on a relatively small number of large customers; risks and compliance obligations relating to the global nature of our operations; failure to realize the benefits expected from the transactions we complete, including the acquisition of Ansys (the Ansys Merger) or unexpected difficulties or expenditures arising therefrom; risks related to inaccuracies in, or failures to achieve, our operational and business metrics or forecasts of growth; and more. Additional information on potential risks, uncertainties and other factors that could affect Synopsys' results is included in filings we make with the SEC from time to time, including in the sections entitled "Risk Factors" in our latest Annual Report on Form 10-K and in our latest Quarterly Report on Form 10-Q. The financial information contained in this press release should be read in conjunction with the consolidated financial statements and notes thereto included in Synopsys' most recent reports on Forms 10-K and 10-Q, each as may be amended from time to time. Synopsys' financial results for its second quarter of fiscal year 2026 are not necessarily indicative of Synopsys' operating results for any future periods.Effectiveness of Information
The targets included in this press release, the statements made during the earnings conference call, the information contained in the financial supplement and the corporate overview presentation, each of which are available in the investor relations portion of Synopsys' corporate website at www.synopsys.com (collectively, the Earnings Materials), represent Synopsys' expectations and beliefs as of May 27, 2026. Although these Earnings Materials are expected to remain available on Synopsys' website through the time Synopsys announces its results for the third quarter of fiscal year 2026, their continued availability through such time does not mean that Synopsys is reaffirming or confirming their continued validity. Synopsys undertakes no duty, and does not intend, to update any forward-looking statement, including any targets, provided in the Earnings Materials, whether as a result of new information, future events or otherwise, unless required by law.SYNOPSYS, INC.Unaudited Condensed Consolidated Statements of Income(in thousands, except per share amounts)
















Three Months Ended
Six Months Ended
April 30,
April 30,
2026
2025
2026
2025Revenue:






  Time-based products$          945,624
$          828,326
$        1,897,165
$        1,656,564  Upfront products546,252
510,676
1,287,782
878,800    Total products revenue1,491,876
1,339,002
3,184,947
2,535,364  Maintenance and service784,109
265,264
1,499,836
524,217      Total revenue2,275,985
1,604,266
4,684,783
3,059,581Cost of revenue:






  Products232,897
216,216
475,299
385,058  Maintenance and service148,597
94,471
295,335
187,008  Amortization of acquired intangible assets248,356
7,660
496,598
16,256      Total cost of revenue629,850
318,347
1,267,232
588,322Gross margin1,646,135
1,285,919
3,417,551
2,471,259Operating expenses:






  Research and development700,124
553,979
1,415,112
1,107,195  Sales and marketing381,998
215,021
778,373
424,220  General and administrative172,418
136,497
355,150
303,583  Amortization of acquired intangible assets 155,275
3,996
311,268
7,996  Restructuring charges115,894
—
234,176
—      Total operating expenses1,525,709
909,493
3,094,079
1,842,994Operating income120,426
376,426
323,472
628,265Interest expense(133,364)
(94,336)
(296,079)
(105,475)Other income (expense), net32,214
114,101
70,936
164,518Income before income taxes19,276
396,191
98,329
687,308Provision for income taxes2,408
47,181
16,745
40,887Net income from continuing operations16,868
349,010
81,584
646,421Loss from discontinued operations, net of income
taxes—
(3,900)
—
(3,900)Net income16,868
345,110
81,584
642,521Less: Net income (loss) attributed to non-controlling
interest and redeemable non-controlling interest(237)
(222)
(479)
1,506Net income attributed to Synopsys$           17,105
$          345,332
$           82,063
$          641,015







Net income (loss) attributed to Synopsys






 Continuing operations$           17,105
$          349,232
$           82,063
$          644,915 Discontinued operations—
(3,900)
—
(3,900) Net income$           17,105
$          345,332
$           82,063
$          641,015







Net income (loss) per share attributed to Synopsys -
basic:






  Continuing operations$             0.09
$             2.25
$             0.43
$             4.17  Discontinued operations—
(0.02)
—
(0.03)  Basic net income per share$             0.09
$             2.23
$             0.43
$             4.14







Net income (loss) per share attributed to Synopsys -
diluted:






  Continuing operations$             0.09
$             2.24
$             0.43
$             4.13  Discontinued operations—
(0.03)
—
(0.03)  Diluted net income per share$             0.09
$             2.21
$             0.43
$             4.10







Shares used in computing per share amounts:






  Basic191,464
154,927
190,513
154,666  Diluted192,144
156,088
191,580
156,218








SYNOPSYS, INC.Unaudited Condensed Consolidated Balance Sheets(in thousands, except par value amounts)






April 30, 2026
October 31, 2025ASSETS:



Current assets:



  Cash and cash equivalents
$        2,412,472
$        2,888,030  Short-term investments
71,966
72,929          Total cash, cash equivalents and short-term investments
2,484,438
2,960,959  Accounts receivable, net
1,267,305
1,505,427  Inventories
441,836
365,190  Prepaid and other current assets
1,195,391
1,180,526  Current assets held for sale
48,248
—          Total current assets
5,437,218
6,012,102Property and equipment, net
714,744
696,693Operating lease right-of-use assets, net
697,112
702,008Goodwill
26,853,807
26,899,215Intangible assets, net
11,875,418
12,679,591Deferred income taxes
113,642
112,159Other long-term assets
1,197,086
1,122,693           Total assets
$      46,889,027
$      48,224,461




LIABILITIES AND STOCKHOLDERS' EQUITY:



Current liabilities:



  Accounts payable and accrued liabilities
$        1,185,204
$        1,326,211  Operating lease liabilities
135,523
128,205  Deferred revenue
2,419,876
2,245,961  Short-term debt
22,117
22,117  Current liabilities held for sale
27,912
—           Total current liabilities
3,790,632
3,722,494Long-term operating lease liabilities
670,475
680,698Long-term deferred revenue
389,419
382,557Long-term debt
10,013,845
13,462,398Other long-term liabilities
1,547,591
1,649,299           Total liabilities
16,411,962
19,897,446Stockholders' equity:



  Preferred stock, $0.01 par value: 2,000 shares authorized; none outstanding
—
—  Common stock, $0.01 par value: 400,000 shares authorized; 191,444 and 185,994
shares outstanding, respectively
1,928
1,860  Capital in excess of par value
20,565,562
18,640,947  Retained earnings
10,397,550
10,315,487  Treasury stock, at cost: 593 and 1,222 shares, respectively
(242,827)
(398,278)  Accumulated other comprehensive loss
(244,082)
(232,414)           Total Synopsys stockholders' equity
30,478,131
28,327,602Non-controlling interest
(1,066)
(587)           Total stockholders' equity
30,477,065
28,327,015           Total liabilities and stockholders' equity
$      46,889,027
$      48,224,461














SYNOPSYS, INC.Unaudited Condensed Consolidated Statements of Cash Flows(in thousands)




Six Months Ended April 30,
2026
2025CASH FLOWS FROM OPERATING ACTIVITIES:


Net income $           81,584
$          642,521Adjustments to reconcile net income to net cash provided by operating
activities:


Amortization and depreciation907,177
96,838Reduction of operating lease right-of-use assets72,852
51,728Amortization of capitalized costs to obtain revenue contracts 41,158
25,405Stock-based compensation481,027
388,186Allowance for credit losses14,842
15,940Loss on sale of strategic investments—
2,435Gain on sale of building—
(51,385)Loss on divestitures, net of transaction costs—
8,299Amortization of bridge financing costs—
40,411Amortization of debt issuance costs16,903
2,348Deferred income taxes(121,045)
(237,170)Other (153)
(181)Net changes in operating assets and liabilities, net of effects from
acquisitions and dispositions:


Accounts receivable234,512
(74,098)Inventories(85,832)
(39,766)Prepaid and other current assets44,649
(140,472)Other long-term assets(87,060)
(36,058)Accounts payable and accrued liabilities(114,629)
(242,529)Operating lease liabilities(74,166)
(48,617)Income taxes(122,420)
(36,870)Deferred revenue196,367
(37,412)Unrealized loss on settlement of interest rate treasury lock—
(121,643)Net cash provided by operating activities1,485,766
207,910



CASH FLOWS FROM INVESTING ACTIVITIES:


Proceeds from maturities of short-term investments11,180
35,461Proceeds from sales of short-term investments3,656
22,015Purchases of short-term investments(13,903)
(47,558)Purchases of strategic investments(781)
(3,368)Purchases of property and equipment, net(89,518)
(96,303)Proceeds from sale of building—
74,279Proceeds from business divestiture, net of cash divested—
70,082Other—
(611)Net cash provided by (used in) investing activities(89,366)
53,997



CASH FLOWS FROM FINANCING ACTIVITIES:


Proceeds from debt, net of issuance costs—
10,034,464Repayment of debt (3,462,369)
(1,289)Issuances of common stock116,136
118,308Payments for taxes related to net share settlement of equity awards(217,884)
(166,872)Common stock issuance for private placement2,000,000
—Purchase of equity forward contract(37,500)
—Purchases of treasury stock(262,500)
—Redemption of redeemable non-controlling interest—
(30,000)Net cash provided by (used in) financing activities(1,864,117)
9,954,611Effect of exchange rate changes on cash, cash equivalents and restricted cash(9,247)
8,186Net change in cash, cash equivalents and restricted cash(476,964)
10,224,704Cash, cash equivalents and restricted cash, beginning of year2,893,721
3,898,729Cash, cash equivalents and restricted cash, end of period$        2,416,757
$      14,123,433




Synopsys provides segment information, namely revenue, adjusted segment operating income and adjusted segment operating margin, in accordance with Financial Accounting Standards Board Accounting Standards Codification Topic 280, Segment Reporting. Synopsys' chief operating decision maker (CODM) is our Chief Executive Officer. In evaluating our business segments, the CODM considers the income and expenses that the CODM believes are directly related to those segments. The CODM does not allocate certain operating expenses managed at a consolidated level to our business segments and, as a result, the reported operating income and operating margin do not include these unallocated expenses as shown in the table below. These unallocated expenses are presented in the table below to provide a reconciliation of the total adjusted operating income from segments to our consolidated operating income:SYNOPSYS, INC.Business Segment Reporting (1)(in millions)








Three Months Ended
April 30, 2026
Three Months Ended
April 30, 2025
Six Months Ended April 30, 2026
Six Months Ended
April 30, 2025



Revenue by segment






- Design Automation$            1,821.8
$             1,122.3
$             3,823.6
$             2,142.5% of Total80.0 %
70.0 %
81.6 %
70.0 %- Design IP$               454.2
$                482.0
$                861.2
$                917.1% of Total20.0 %
30.0 %
18.4 %
30.0 %







Adjusted operating income by segment






- Design Automation$               789.1
$                458.8
$             1,736.6
$                863.4- Design IP$               110.6
$                150.5
$                176.8
$                277.1







Adjusted operating margin by segment






- Design Automation43.3 %
40.9 %
45.4 %
40.3 %- Design IP24.4 %
31.2 %
20.5 %
30.2 %







Total Adjusted Segment Operating Income Reconciliation (1)(in millions)








Three Months Ended
April 30, 2026
Three Months Ended
April 30, 2025
Six Months Ended April 30, 2026
Six Months Ended
April 30, 2025



GAAP total operating income – as reported$                120.4
$                376.4
$                323.5
$                628.3Other expenses managed at consolidated level






Amortization of acquired intangible assets403.6
11.7
807.9
24.3Stock-based compensation (2)222.3
201.7
481.0
388.2Restructuring charges115.9
—
234.2
—Acquisition/divestiture related items (3)23.6
39.6
39.2
100.3Non-qualified deferred compensation plan13.8
(20.1)
27.6
(0.5)Total adjusted segment operating income$                899.7
$                609.3
$               1,913.4
$               1,140.5







(1) Synopsys manages the business on a long-term, annual basis, and considers quarterly fluctuations of revenue and profitability as normal elements of our
business. Amounts may not foot due to rounding.(2) The adjustment includes non-GAAP expenses attributable to non-controlling interest and redeemable non-controlling interest.(3) The adjustment excludes the amortization of bridge financing costs entered into in connection with the Ansys Merger that was recorded in interest
expense, and certain divestiture related items that were recorded in other income (expense), net in our unaudited condensed consolidated statements of
income. GAAP to Non-GAAP Reconciliation
Synopsys continues to provide all information required in accordance with GAAP but acknowledges evaluating its ongoing operating results may not be as useful if an investor is limited to reviewing only GAAP financial measures. Accordingly, Synopsys presents non-GAAP financial measures in reporting its financial results to provide investors with an additional tool to evaluate Synopsys' operating results in a manner that focuses on what Synopsys believes to be its core business operations and what Synopsys uses to evaluate its business operations and for internal budgeting and resource allocation purposes. This press release includes non-GAAP earnings per diluted share, non-GAAP net income and non-GAAP tax rate for the periods presented. It also includes future estimates for non-GAAP expenses, non-GAAP interest and other income (expense), net, non-GAAP tax rate, non-GAAP earnings per diluted share and free cash flow. These non-GAAP financial measures may be different from non-GAAP financial measures used by other companies.When possible, Synopsys provides a reconciliation of non-GAAP financial measures to their most closely applicable GAAP financial measures. Synopsys is unable to provide a full reconciliation of certain third quarter and full fiscal year 2026 non-GAAP financial targets to the corresponding GAAP financial measures on a forward-looking basis because Synopsys believes that it would not be possible for it to have the required information necessary to quantitatively reconcile such measures with sufficient precision without unreasonable efforts due to, among other things, the potential variability and limited predictability of the excluded adjustment items necessary for a full reconciliation such as certain acquisition/divestiture related items, tax deduction variability, changes in the fair value of non-qualified deferred compensation plan, and gains (losses) on the sale of strategic investments. For the same reasons, Synopsys is unable to address the probable significance of the unavailable information. Synopsys' management does not itself, nor does it suggest that investors should, consider such non-GAAP financial measures in isolation from, as superior to, or as a substitute for, financial information prepared in accordance with GAAP. These non-GAAP financial measures are meant to supplement, and be viewed in conjunction with, the corresponding GAAP financial measures. Synopsys' management believes the presentation of non-GAAP financial measures, when shown in conjunction with the corresponding GAAP financial measures, provides useful information to investors allowing them to view financial and business trends relating to our financial condition and results of operations through the eyes of management. Synopsys' management evaluates and makes decisions about our business operations using both GAAP financial measures and non-GAAP financial measures to help facilitate internal comparisons to Synopsys' historical operating results and forecasted targets, planning and forecasting in subsequent periods and comparisons to competitors' operating results.The following are descriptions of the adjustments made to reconcile non-GAAP financial measures (other than free cash flow, which is defined in the footnote to the Financial Targets table above) to the most directly comparable GAAP financial measures:(i) Amortization of acquired intangible assets. We incur expenses from the amortization of acquired intangible assets, which may include impairment charges from write-downs of acquired intangible assets. Acquired intangible assets include, among other things, core/developed technology, customer relationships, contract rights, trademarks and trade names, and other intangibles related to acquisitions. We amortize the intangible assets over their estimated useful lives. We do not enter into acquisitions on a predictable cycle. The amount of an acquisition's purchase price allocated to intangible assets and their estimated useful lives can vary significantly and are unique to each acquisition. From time to time, we incur impairment charges due to write-downs of acquired intangible assets. We believe that the presentation of non-GAAP financial measures that adjust for the amortization of intangible assets, including impairment charges, provides investors and others with a consistent basis for comparison across accounting periods. We also exclude this item because such expenses are non-cash in nature and we believe the non-GAAP financial measures excluding this item provide meaningful supplemental information regarding our core operational performance and liquidity, and ability to invest in research and development and fund future acquisitions and capital expenditures.(ii) Stock-based compensation. Stock-based compensation expenses consist primarily of expenses related to restricted stock units, stock options, employee stock purchase rights and other stock awards, including such expenses associated with acquisitions. We exclude stock-based compensation expense from our non-GAAP financial measures primarily because it is not an expense that typically requires or will require cash settlement by us. Further, the expense for the fair value of the stock-based instruments we utilize may bear little resemblance to the actual value realized upon the vesting or future exercise of the related stock-based awards and, therefore, is not used by management to assess the core profitability of our business operations.(iii) Acquisition/divestiture related items. In connection with certain of our business combinations and/or divestitures, we incur significant expenses that we would not have otherwise incurred as part of our business operations. These expenses include, among other things, compensation expenses, professional fees and other direct expenses, concurrent restructuring activities and divestiture activities, including employee severance and other exit costs, bridge financing costs, costs related to integration activities, debt forgiveness, changes to the fair value of contingent consideration related to the acquired company, and amortization of the fair value difference of below-market value assets arising from arrangements entered into or acquired in conjunction with an acquisition. We also recognize the gains and losses from the mark-up of equity or cost method investments to fair value upon obtaining control through acquisition. We exclude these items because they are related to acquisitions and divestitures and have no direct correlation to the core operation of our business. Further, because we do not acquire or divest businesses on a predictable cycle and the terms of each transaction can vary significantly and are unique to each transaction, we believe it is useful to exclude such expenses when looking for a consistent basis for comparison across accounting periods.(iv) Restructuring charges. We initiate restructuring activities to align our costs to our operating plans and business strategies based on then-current economic conditions, and such activities have a specific and defined term. Restructuring costs generally include severance and other termination benefits related to voluntary retirement programs, involuntary headcount reductions and facilities closures. Such restructuring costs include elimination of operational redundancy, permanent reductions in workforce and facilities closures and, therefore, are not considered by us to be a part of the core operation of our business and are not used by management when assessing the core profitability and performance of our business operations.(v) Gains (losses) on the sale of strategic investments. We exclude gains and losses on the sale of equity investments in privately held companies because we do not believe they are reflective of our core business and operating results.(vi) Deferred compensation. We exclude changes in the fair value of our non-qualified deferred compensation plan because we do not use these to assess the core profitability of our business operations.(vii) Income tax effect of non-GAAP pre-tax adjustments. Excluding the income tax effect of non-GAAP pre-tax adjustments from the provision for income taxes assists investors in understanding the tax provision associated with those adjustments and the effect on net income.  Beginning in fiscal year 2026, we transitioned from an annual non-GAAP tax rate to a three-year normalized non-GAAP tax rate of 18.0%. We believe this will provide better consistency across reporting periods by eliminating the effects of non-recurring and period-specific items, which can vary in size and frequency and do not necessarily reflect our normal operations. This rate is based on our projected annual rate through fiscal year 2028, primarily due to the completion of the acquisition of Ansys in the third quarter of fiscal year 2025 and the enactment of the One Big Beautiful Bill Act (the OBBB), which affects taxable income starting in fiscal year 2026 over the next several years. In projecting this rate, we evaluated our historical and projected mix of U.S. and international profit before tax, excluding the impact of stock-based compensation, the amortization of purchased intangibles and other GAAP only adjustments described above. We also considered other factors, including our current tax structure, U.S. tax law changes, such as the OBBB which impacts Synopsys' expensing of U.S. research expenditures commencing in fiscal year 2026, and changes to foreign derived intangible income commencing in fiscal year 2027.About Synopsys
Synopsys, Inc. (Nasdaq: SNPS) is the leader in engineering solutions from silicon to systems, enabling customers to rapidly innovate AI-powered products. We deliver industry-leading silicon design, IP, simulation and analysis solutions, and design services. We partner closely with our customers across a wide range of industries to maximize their R&D capability and productivity, powering innovation today that ignites the ingenuity of tomorrow. Learn more at?www.synopsys.com.?©  2026 Synopsys, Inc. All rights reserved. Synopsys, Ansys, the Synopsys and Ansys logos, and other Synopsys trademarks are available at https://www.synopsys.com/company/legal/trademarks-brands.html. Other company or product names may be trademarks of their respective owners.INVESTOR CONTACT:
Tushar Jain
Synopsys, Inc.
650-584-4289
Synopsys-ir@synopsys.comEDITORIAL CONTACT:
Cara Walker
Synopsys, Inc.
650-584-5000
corp-pr@synopsys.com View original content to download multimedia:https://www.prnewswire.com/news-releases/synopsys-posts-financial-results-for-second-quarter-fiscal-year-2026-302783403.htmlSOURCE Synopsys, Inc. Original: Synopsys Posts Financial Results for Second Quarter Fiscal Year 2026

Synopsys Appoints Jesse Cohn to Board of DirectorsMay 27, 2026 4:06 PM
PR Newswire (US) SUNNYVALE, Calif., May 27, 2026 /PRNewswire/ -- Synopsys, Inc.(NASDAQ: SNPS) today announced it has entered into a cooperation agreement with Elliott Investment Management L.P. (together with certain affiliates, "Elliott"), including the appointment of Jesse Cohn to its board of directors as an independent director, effective June 1, 2026. Cohn is a Managing Partner at Elliott with a long track record of success as an investor in and director of public technology companies. "As an experienced board member, Jesse brings a uniquely differentiated perspective," said Aart de Geus, executive chair and founder of Synopsys. "He enthusiastically shares our belief that strategic focus, augmented by disciplined execution, is foundational to achieve both high impact in our industry and sustainable, long-term value creation. His joining us as a director, further strengthens our company, and I welcome Jesse's positive engagement and contributions to our Board."  "Synopsys is essential to the global chip industry and is well-positioned to benefit from increasing AI investment and engineering complexity," said Cohn. "Synopsys has transformed from the leader in EDA to the leader in engineering solutions, and its differentiated portfolio provides substantial opportunity to ensure the company's financial performance reflects the value Synopsys delivers to the industry. I look forward to working with Sassine, Aart and the rest of the team in support of the company's efforts to drive value for all stockholders.""Jesse has deep appreciation for our business and the mission-critical role we play in helping customers engineer AI-powered products from silicon to systems," said Sassine Ghazi, president and CEO of Synopsys. "As we drive increased competitive differentiation, value and execution across the business, his appointment aligns with our direction. I've enjoyed getting to know Jesse and welcome his constructive insights as a member of the Synopsys Board." With Cohn joining, the Synopsys Board of Directors expands to 11 members. Under the cooperation agreement, Elliott has agreed to customary standstill, voting, and confidentiality commitments, among other provisions. Cohn also will join the Corporate Governance and Nominating Committee of the Board. The cooperation agreement will be filed on a Form 8-K with the Securities and Exchange Commission.About Jesse CohnJesse Cohn is a Managing Partner and member of the Management, Risk, Allocation and Investment Committees at Elliott. He has served as an independent director of several public technology companies including Citrix Systems, eBay, and Twitter and is a member of the advisory board at the Harvard Law School Program on Corporate Governance. Prior to joining Elliott in 2004, Cohn was an Analyst in the mergers and acquisitions group at Morgan Stanley. He earned his B.S. in Economics from the University of Pennsylvania's Wharton School of Business, from which he graduated summa cum laude.About SynopsysSynopsys, Inc. (Nasdaq: SNPS) is the leader in engineering solutions from silicon to systems, enabling customers to rapidly innovate AI-powered products. We deliver industry-leading silicon design, IP, simulation and analysis solutions, and design services. We partner closely with our customers across a wide range of industries to maximize their R&D capability and productivity, powering innovation today that ignites the ingenuity of tomorrow. Learn more at www.synopsys.com.© 2026 Synopsys, Inc. All rights reserved. Synopsys, Ansys, the Synopsys and Ansys logos, and other Synopsys trademarks are available at https://www.synopsys.com/company/legal/trademarks-brands.html. Other company or product names may be trademarks of their respective owners.Forward-Looking StatementsThis press release contains forward-looking statements, including, but not limited to, statements concerning value creation and future financial and operational results. These statements involve risks, uncertainties and other factors that could cause our actual results, time frames or achievements to differ materially from those expressed or implied in such forward-looking statements. Information on potential risks, uncertainties and other factors that could affect Synopsys' results is included in filings we make with the SEC from time to time, including in the sections entitled "Risk Factors" in our latest Annual Report on Form 10-K and in our latest Quarterly Report on Form 10-Q.ContactsInvestors:
Tushar Jain
Synopsys, Inc.
650-584-4289
Synopsys-ir @firevestor-5000
corp-pr@synopsys.com View original content to download multimedia:https://www.prnewswire.com/news-releases/synopsys-appoints-jesse-cohn-to-board-of-directors-302783338.htmlSOURCE Synopsys, Inc. Original: Synopsys Appoints Jesse Cohn to Board of Directors

Synopsys Announces Earnings Release Date for Second Quarter Fiscal Year 2026April 27, 2026 4:05 PM
PR Newswire (US)

SUNNYVALE, Calif., April 27, 2026 /PRNewswire/ -- Synopsys, Inc. (Nasdaq: SNPS) today announced it will report results for the second quarter fiscal year 2026 on Wednesday, May 27, 2026, after market close. The company will host a conference call at 2:00 p.m. Pacific Time / 5:00 p.m. Eastern Time to review its financial results and business outlook.







Financial and other statistical information to be discussed on this conference call will be available on the corporate website at www.investor.synopsys.com immediately before the call. A live webcast will also be available on this site. Participants should access the live webcast at least 10 minutes prior to the start of the call. A webcast replay will be available beginning May 27, 2026, at approximately 5:00 p.m. PT. The replay will be available until Synopsys announces its third quarter fiscal year 2026 results.About Synopsys
Synopsys, Inc. (Nasdaq: SNPS) is the leader in engineering solutions from silicon to systems, enabling customers to rapidly innovate AI-powered products. We deliver industry-leading silicon design, IP, simulation and analysis solutions, and design services. We partner closely with our customers across a wide range of industries to maximize their R&D capability and productivity, powering innovation today that ignites the ingenuity of tomorrow. Learn more at www.synopsys.com. © 2026 Synopsys, Inc. All rights reserved. Synopsys, Ansys, the Synopsys and Ansys logos, and other Synopsys trademarks are available at https://www.synopsys.com/company/legal/trademarks-brands.html. Other company or product names may be trademarks of their respective owners.Investor Contact:                                                       
Christine Salvi-Sullivan
Synopsys, Inc.
(650) 584-1901Editorial Contact:
Cara Walker
Synopsys, Inc.
650-584-5000
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Original: Synopsys Announces Earnings Release Date for Second Quarter Fiscal Year 2026

Synopsys Partners with TSMC to Power Next-Generation AI Systems with Silicon Proven IP and Certified EDA FlowsApril 22, 2026 3:00 PM
PR Newswire (US)

AI-powered digital, analog and verification flows and broad IP solutions deliver exceptional quality of results for TSMC advanced technologiesSuccessful silicon bring-up of industry's first low-power M-PHY v6.0 IP on TSMC N2P, tape-out of 64G UCIe IP, and 224G IP speeds development of next-generation AI systemsOngoing collaboration on AI-powered digital, analog, and verification flows and power integrity platforms across TSMC advanced nodes to deliver optimized quality of resultsCollaboration on agentic run assistance in Synopsys Fusion Compiler improves PPA and design productivity on TSMC A14 using TSMC NanoFlex™ Pro architectureSynopsys 3DIC Compiler platform delivers productivity improvement for TSMC's CoWoS® technology at 5.5x reticle interposer sizes, enabling efficient 3D multi-die designsMultiphysics design enablement for COUPE supports next-generation co-packaged opticsSUNNYVALE, Calif., April 22, 2026 /PRNewswire/ -- Synopsys, Inc. (Nasdaq: SNPS) announced today major advances in silicon-proven IP, AI-powered EDA flows, and system-level enablement across TSMC's most advanced processes and packaging technology nodes, including the TSMC 3nm and 2nm families, as well as A16™ with Super Power Rail and A14.







By unifying intelligent digital, analog, and verification flows, advanced 3D multi-die design, and optical-to-electrical design capabilities, Synopsys helps engineers improve quality of multiphysics results and accelerate development cycles from silicon to systems for increasingly complex AI and high-performance computing designs."TSMC's most advanced process and packaging technologies are opening new frontiers for performance, bandwidth, and energy efficiency in AI and autonomous systems," said Michael Buehler-Garcia, Senior Vice President at Synopsys. "Through our deep collaboration, Synopsys is delivering AI-driven design flows, advanced multiphysics signoff, and a comprehensive portfolio of proven interface and foundation IP that help customers accelerate innovation and achieve outstanding quality of results.""Our collaboration with Open Innovation Platform® (OIP) ecosystem partners like Synopsys continues to expand across TSMC's advanced nodes and 3DFabric® technologies to meet the rapidly growing demands of AI and high-performance computing," said Aveek Sarkar, Director of the Ecosystem and Alliance Management Division at TSMC. "By combining Synopsys' certified EDA solutions and IP portfolio with our latest process and packaging innovations, we are enabling customers to push the boundaries of performance, integration, and energy efficiency—driving leadership silicon for the next-generation of AI systems."Advancing 3DFabric with Integrated Analysis and Signoff Flows for Optical, Electrical, and Thermal
To support the growing scale and complexity of multi-die designs, Synopsys and TSMC have enhanced enablement across TSMC's 3DFabric technologies, including TSMC-SoIC® and CoWoS® for 5.5x reticle interposer sizes. Synopsys' 3DIC Compiler, a unified exploration-to-signoff platform, enables designs using TSMC's 3DFabric technologies with automation capabilities for productivity gains. Synopsys' 3DIC Compiler integrates with RedHawk-SC™, RedHawk-SC Electrothermal™, and Ansys HFSS™ software to deliver multiphysics analysis for thermal, power, and high-speed signal integrity.Collaboration with Synopsys RedHawk-SC™ for digital power integrity, Synopsys Totem™ for analog power integrity, and HFSS-IC Pro for electromagnetic extraction expands from TSMC A16™ to A14. Synopsys Totem-SC™ provides analog power integrity signoff at ultrahigh-capacity for large N2-based designs and embedded memories, while Synopsys PathFinder-SC™ extends multi-die electrostatic discharge (ESD) signoff coverage to N2. Cloud-based multiprocessor and GPU acceleration further shortens turnaround time, enabling multiphysics design teams to iterate rapidly across complex, thermally constrained 3D assemblies.Expanded multiphysics simulation and analysis capabilities strengthen coverage across photonic, electrical, and thermal domains. Enablement for COUPE spans Ansys Zemax OpticStudio® for optical path simulation, Ansys Lumerical™ for photonic device simulation, HFSS-IC Pro for electromagnetic extraction, and RedHawk-SC Electrothermal for thermal and electrical co-simulation. Together, these tools support the design of co-packaged optical solutions for high-bandwidth datacenter connectivity.Accelerating Design Productivity and Time-to-Results
Synopsys is collaborating with TSMC on agentic run assistance in Synopsys Fusion Compiler™ on TSMC's A14 process using NanoFlex Pro architecture identifying timing improvement opportunities at different stages of the design flow for better quality of results. In addition, enablement of AI-assisted physical verification in Synopsys IC Validator™ is on-going, aiming to accelerate the identification and resolution of DRC violations for faster tapeout quality results.Extensive IP Portfolio on Advanced, Specialty, and Automotive TSMC Nodes
This year, Synopsys advanced its IP portfolio with significant innovations that strengthened its leadership in high-performance connectivity for AI, data center, edge, and automotive markets. Through a key photonics collaboration, the company introduced a 224G IP solution that enables co-packaged optical Ethernet and UALink to address the bandwidth demands of next-generation electro-optical systems. Synopsys also achieved multiple first-silicon milestones on TSMC's N5, N3P, and N2P processes— including PCIe 7.0, HBM4, 224G, DDR5 MRDIMM Gen2, LPDDR6/5X/5, UCIe 64G, and M-PHY v6.0 IP — establishing new levels in performance, power efficiency, and scalability.Synopsys expanded its industry leading, silicon proven Foundation IP portfolio for TSMC's N3P and N2P processes, offering embedded memories, logic libraries, and IOs that enable low power data centers, AI accelerators, mobile networks, and advanced cloud computing platforms. With strong market traction, industry leading PPA, and a robust roadmap across compact "C" nodes from N6 to N3, Synopsys Foundation IP is ready to power the next wave of semiconductor innovation.Additionally, Synopsys strengthened its automotive leadership with the launch of a complete UCIe IP ASILB solution on N5A, complementing its high reliability Interface and Foundation IP offerings on TSMC's N5A and N3A nodes for next-generation vehicle SoCs and reinforcing its momentum in the fast-growing automotive chiplet ecosystem.Additional ResourcesBlog: Learn about Synopsys' silicon bring-up of M-PHY v6.0 IP on TSMC's N2P process.Blog: Learn how Synopsys is delivering LPDDR6 Read/Write Eyes at 10.67 Gb/s on TSMC's N2P process.Webinar: Gain executive-level insights from Synopsys, TSMC and others, into silicon and system engineering for AI hardware from experts at the forefront of these groundbreaking AI innovationsSynopsys is also hosting several demonstrations at Booth #302 in TSMC 2026 Technology Symposium in North America. For more information, visit Synopsys TSMC Technology Symposium page.About Synopsys
Synopsys, Inc. (Nasdaq: SNPS) is the leader in engineering solutions from silicon to systems, enabling customers to rapidly innovate AI-powered products. We deliver industry-leading silicon design, IP, simulation and analysis solutions, and design services. We partner closely with our customers across a wide range of industries to maximize their R&D capability and productivity, powering innovation today that ignites the ingenuity of tomorrow. Learn more at www.synopsys.com.© 2026 Synopsys, Inc. All rights reserved. Synopsys, Ansys, the Synopsys and Ansys logos, and other Synopsys trademarks are available at https://www.synopsys.com/company/legal/trademarks-brands.html. Other company or product names may be trademarks of their respective owners.Contacts
Media   
Kelli Wheeler
Synopsys, Inc.
corp-pr@synopsys.com  



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Original: Synopsys Partners with TSMC to Power Next-Generation AI Systems with Silicon Proven IP and Certified EDA Flows

Synopsys Supports New Arm AGI CPU with Full-Stack Design SolutionsMarch 24, 2026 1:15 PM
PR Newswire (US)

Arm and Synopsys partnership extended to new Arm data center CPU, including EDA, IP, and Hardware-Assisted Verification SolutionsKey HighlightsSynopsys' broad portfolio of design, analysis, and verification solutions available on Arm-based architecture enables data center-class requirements and low total cost of compute during developmentSynopsys silicon-proven interface IP solutions deliver reliable high-performance design implementation to support compute subsystemsSynopsys high-performance emulation and prototyping systems enable IP and subsystem bring-up and system-level verification for complex data center workloadsSUNNYVALE, Calif., March 24, 2026 /PRNewswire/ -- Synopsys, Inc. (Nasdaq: SNPS) today announced its collaboration with Arm on the development of the Arm AGI CPU, providing solutions across its full-stack design portfolio including EDA, interface IP, and hardware-assisted verification (HAV).







"Designing data center silicon for increasingly complex AI workloads requires rigorous validation across the full system," said Mohamed Awad, executive vice president, Cloud AI Business Unit, Arm. "The Arm AGI CPU reflects the strength of our SoC design and the effectiveness of our collaboration with Synopsys. Their design, IP, and verification solutions supported the development and validation of our breakthrough performance-per-watt chip for next-generation AI infrastructure.""We congratulate Arm for delivering the AGI CPU with such ambition and precision," said Ravi Subramanian, chief product management officer, Synopsys. "This achievement reflects exceptional engineering discipline, and we're proud that Synopsys design, IP, and advanced verification solutions played a mission-critical role in delivering this innovation."Arm and Synopsys collaborated closely to optimize the power, performance, and efficiency of the AGI CPU, built on Arm® Neoverse® CSS V3. Synopsys solutions used for the design and verification of the Arm AGI CPU, include:Broad Portfolio of Arm-Enabled Synopsys Design Solutions Supports Power, Performance, and Area Requirements for HPC and AI Use Cases
Synopsys delivers the industry's broadest portfolio of design solutions on Arm-based architectures, including Synopsys VCS®, Fusion Compiler™, IC Validator™, PrimeTime®, and RedHawk-SC™. Synopsys provided a comprehensive portfolio of design tools with support for Arm-based architectures, including solutions for synthesis, power integrity and reliability analysis, and signoff timing and physical verification. These tools are used to support development workflows for complex, high-performance compute platforms and advanced scalability and silicon-proven success on advanced nodes, helping to achieve fast turnaround time.Synopsys Silicon-Proven Interface IP Accelerates Development, Reduces Integration Risk
Synopsys and Arm are continuing the companies' work together to co-optimize their IP solutions. Synopsys silicon-proven, complete IP solutions help accelerate interface subsystem development, reduce integration risk, speed the path to production, and improve silicon management.Synopsys Software-Defined Hardware-Assisted Verification (HAV) Enables Pre-Silicon Software Confidence and System-Scale Validation
As the industry's highest-performance emulation and prototyping platforms, Synopsys' software-defined HAV solutions help accelerate verification and software development. Synopsys ZeBu® Server 5, combined with pre-verified Synopsys IP-HAV solutions, delivers the speed, accuracy, and fidelity needed for bring-up and system functionality and power validation ahead of silicon and on schedule. In addition, Synopsys HAPS® prototyping systems support extensive software development and system-level performance validation use cases with broad access to Synopsys Interface Protocol Kits (IPKs) for Synopsys IP titles, further helping accelerate verification and time to market.Synopsys support for the Arm Total Design ecosystem continues with the launch of the AGI CPU as the companies continue to collaborate to accelerate custom silicon development and reduce design complexity for Neoverse Compute Subsystems (CSS).Learn more about how Arm and Synopsys are collaborating to advance custom silicon innovation: https://www.synopsys.com/partners/arm.html. To learn more about Synopsys' full-stack design capabilities for HPC and data center use cases, visit https://www.synopsys.com/hpc-data-center.html.About Synopsys
Synopsys, Inc. (Nasdaq: SNPS) is the leader in engineering solutions from silicon to systems, enabling customers to rapidly innovate AI-powered products. We deliver industry-leading silicon design, IP, simulation and analysis solutions, and design services. We partner closely with our customers across a wide range of industries to maximize their R&D capability and productivity, powering innovation today that ignites the ingenuity of tomorrow. Learn more at www.synopsys.com.© 2026 Synopsys, Inc. All rights reserved. Synopsys, Ansys, the Synopsys and Ansys logos, and other Synopsys trademarks are available at https://www.synopsys.com/company/legal/trademarks-brands.html. Other company or product names may be trademarks of their respective owners.Contacts
Media           
Kelli Wheeler: kelliw@synopsys.com
Pete Smith: pete.smith@synopsys.com
corp-pr@synopsys.com










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Original: Synopsys Supports New Arm AGI CPU with Full-Stack Design Solutions

Synopsys gains after report Elliott has taken ‘multibillion-dollar’ stakeMarch 23, 2026 6:32 AM
IH Market News
Shares of Synopsys Inc (NASDAQ:SNPS) moved higher on Monday following a report that activist hedge fund Elliott Investment Management has accumulated a “multibillion-dollar” position in the company.The Wall Street Journal reported on Sunday, citing people familiar with the matter, that Elliott has built the sizeable stake in the electronic design automation firm. Synopsys shares rose about 2.5% in premarket trading by 05:01 ET.According to the report, Elliott plans to encourage Synopsys to expand the profitability of its software and services operations. The exact size of the investor’s stake has not yet been disclosed.Elliott reportedly views Synopsys as a key player in the global semiconductor ecosystem and believes the company is well positioned to benefit from rapidly growing chip demand driven by artificial intelligence.Wolfe Research analyst Joshua Tilton said that after several recent interactions with the company — including attending Synopsys’ Converge conference and visiting its headquarters — he believes the business is moving in the right direction.“I came away confident the firm has launched the right products and put the right leadership in place to improve the organic growth of the business,” Tilton said.“We are not surprised that Elliot Management sees similar potential,” he added.Tilton also noted that Synopsys shares appear undervalued relative to peers.“With SNPS shares trading at a 30%+ discount on revenue and 20%+ discount on earnings, there is a significant valuation gap to close,” if Elliott is able to help Synopsys accelerate its growth and narrow the gap with rival Cadence Design Systems, he wrote.Synopsys is a major supplier to companies such as Intel, Alphabet and Tesla. The chip design software group has also attracted major industry backing — last year, AI leader Nvidia invested $2 billion in the company.Synopsys stock price

Original: Synopsys gains after report Elliott has taken ‘multibillion-dollar’ stake

Synopsys Showcases NVIDIA Partnership Impact and Ecosystem Innovation at GTC 2026March 16, 2026 4:30 PM
PR Newswire (US)

Customers across industries are revolutionizing product design and accelerating innovation with NVIDIA-accelerated engineering solutions from SynopsysKey Highlights Synopsys is building an open, secure, hardware accelerated agentic AI stack in collaboration with NVIDIA to cater to use cases from silicon to systems Applied Materials collaborates with Synopsys to accelerate complex quantum chemistry simulations for large-scale dynamic materials modeling by up to 30X using Synopsys QuantumATK® optimized with NVIDIA cuESTHonda enabled practical, high-fidelity CFD using four GB200s, achieving 34X faster computation and 38X cost reduction compared to 1,920 cloud-based CPU coresAstera Labs accelerates advanced chip design for AI connectivity running Synopsys PrimeSim™ using B200 GPUs on AWS, achieving 3.5X speed up compared to multi-core CPU simulation Analog Devices, Inc. (ADI) is working with Synopsys and NVIDIA to advance real-world robotic manipulation by delivering industry-grounded robotic benchmarks and high-fidelity sensing simulations to close the sim-to-real gapSUNNYVALE, Calif., March 16, 2026 /PRNewswire/ -- Synopsys, Inc. (NASDAQ: SNPS) at NVIDIA GTC 2026 is showcasing the progress and impact of its strategic partnership with NVIDIA to revolutionize design and engineering across industries. R&D teams, from the semiconductor industry to aerospace, automotive, industrial and beyond, face significant engineering challenges including increasing workflow complexity, escalating development costs, and time-to-market pressure. At GTC, Synopsys is demonstrating how integrating the strengths of NVIDIA's AI and accelerated computing with Synopsys' market-leading engineering solutions is enabling R&D teams to design, simulate, and verify intelligent products at lower cost with greater precision and speed.







"Traditional engineering methods can no longer keep pace with the complexity of today's software-defined, intelligent systems," said Sassine Ghazi, president and CEO of Synopsys. "Together with ecosystem partners, Synopsys and NVIDIA are re-engineering how products are designed and developed. By enabling the co-design of electronics and multiphysics, accelerating compute-intensive workloads and applying the power of digital twin for virtual prototyping, we are helping customers engineer the future.""AI and accelerated computing are fundamentally reinventing engineering — from how products are designed to how they are built and operated," said Jensen Huang, founder and CEO of NVIDIA. "Modern engineering happens inside simulations and digital twins. Together with Synopsys, we are combining NVIDIA CUDA-X, Omniverse, and AI with Synopsys' silicon-to-systems platforms to reimagine engineering for the age of AI and turn growing complexity into a powerful advantage."Shortening Compute-intensive Engineering Workloads with NVIDIA Accelerated ComputingSynopsys has the industry's broadest portfolio of engineering applications that enable AI and GPU-accelerated computing across engineering workloads — making engineering smarter, faster, and more intuitive. Customers are utilizing NVIDIA GPU-accelerated applications from Synopsys to speed up compute-intensive workloads. Today, Synopsys announced several examples:Applied Materials is collaborating with Synopsys and NVIDIA to advance AI and quantum chemistry R&D with accelerated materials modeling. Leveraging Synopsys QuantumATK®'s new integration with NVIDIA cuEST, early results from Applied Materials show a potential 30X speedup for complex quantum chemistry workloads compared to open-source models running on CPUs. Previously, Applied Materials achieved an 8X simulation speedup leveraging NVIDIA GPUs compared to multi-core CPUs for multi-nanometer amorphous systems featuring approximately 25,000 atoms."Applied Materials is working with Synopsys and NVIDIA to accelerate materials engineering innovations that can deliver tremendous improvements in energy-efficient performance of advanced semiconductor devices," said Gary Dickerson, President and CEO of Applied Materials. "This collaboration allows us to significantly reduce the time it takes to run simulations of material behavior at the atomic level, thereby enabling the industry to bring chip design breakthroughs to market faster."Honda has realized unsteady, large-scale, high-fidelity CFD that was previously impractical on CPUs through GPU acceleration on Ansys Fluent® fluid simulation software."We achieved 34x faster computation and 38x cost reduction using four GB200 GPUs compared to 1,920 cloud-based CPU cores," said Yusuke Uda, Assistant Chief Engineer at Honda. "Through close collaboration with Synopsys, Honda is accelerating the migration of its CFD simulations from CPUs to GPUs. This advancement enables us to continue delivering safer, higher-quality products to our customers at appropriate cost, with consideration for the environment."Astera Labs Accelerates Advanced Chip Design for AI Connectivity with Synopsys PrimeSim on AWS using NVIDIA Blackwell GPUAs AI scaling drives the need for high-speed connectivity to move massive datasets with near-zero latency, advanced chips with ultra-high-speed SerDes interfaces require extensive circuit-level simulations. Astera Labs achieved a 3.5X speedup running Synopsys PrimeSim™ using B200 GPU accelerated EC2 instances on AWS compared to CPU-only instances, dramatically shortening design validation cycles and enabling faster time-to-market for next-generation connectivity solutions.The seamless access to GPU resources on AWS enables Astera Labs' design teams to focus on innovation rather than infrastructure setup, further accelerating time-to-market while supporting superior design accuracy."The collaboration between Astera Labs, Synopsys, NVIDIA, and AWS is transforming our ability to design advanced blocks for AI connectivity silicon," said Jitendra Mohan, Chief Executive Officer of Astera Labs. "By harnessing the power of NVIDIA B200 GPU-accelerated computing on AWS, we have significantly reduced simulation times and enhanced design accuracy, allowing us to deliver innovative connectivity solutions to the market faster than ever before." "Astera Labs' work with AWS — achieving dramatically faster design cycles for the connectivity solutions that power AI — demonstrates how cloud technology is transforming innovation across entire industries," said Ozgur Tohumcu, General Manager of Automotive and Manufacturing at AWS. "We're enabling companies to access the most advanced computing tools instantly, changing how breakthrough technologies get built without the burden of managing complex infrastructure."Digital Twins Augmented with Precision Physics Advancing Physical AI Synopsys is an increasingly important component of physical AI development, reducing the gap between simulation and reality by grounding virtual development processes with real-world physics. From autonomous vehicles to humanoid robotics, precise simulation reduces iterations and improves synthetic data purity.ADI's Isaac Sim™ environment, built on NVIDIA Omniverse libraries, is now augmented with Synopsys physics. ADI is leveraging Isaac Sim to produce high-fidelity simulation assets for its tactile sensing prototype and time-of-flight vision systems, along with digital twins of next-generation robotic dexterity benchmarks. The benchmarks evaluate robotic policies for real applications, such as datacenters and automotive manufacturing. Ansys Mechanical™ software and AVxcelerate Sensors™ software bring simulation and reality closer with high-fidelity physics for simulating critical aspects of the test bench, including fiber optic cables and plugs, and sensor depth perception.ADI's platform will support early adopters, including Kawasaki Heavy Industries, by enabling them to simulate robotic performance and generate synthetic data with greater predictive accuracy. This reduces the need for iterative physical testing and accelerates development. Synopsys' booth at GTC will feature a demonstration, including a bi-manual robotic arm setup with force, vision, and contact sensing, and a corresponding Isaac Sim visualization."Synopsys' multiphysics simulation is a critical enabler of realistic robotic test benches," said Paul Golding, Vice President of Edge AI at ADI. "Together with NVIDIA, we're using that fidelity to create benchmarks and digital twins that make sim-to-real transfer practical for real industrial dexterity."Advancing Agentic AI for EngineeringSynopsys is building an open, secure, hardware accelerated agentic AI stack in collaboration with NVIDIA to cater to use cases from silicon to systems. Synopsys' AgentEngineer™ multi-agent workflows leverage NVIDIA Agent Toolkit and support NVIDIA NIM inference services and Nemotron models, providing performance and optionality to customers. At GTC, Synopsys is demonstrating agentic electronic design automation (EDA) workflows, powered by AgentEngineer technology that can orchestrate complex chip design tasks, scale across high-performance environments, and keep engineers in control — accelerating productivity, managing growing design complexity, and redefining how silicon is built in the AI era. Demonstrations will include Synopsys' new industry-first L4 agentic workflow for design and verification.Engage with Synopsys at NVIDIA GTC 2026Visit Synopsys' booth #1135 for demonstrations of the latest AI-powered engineering solutions and engage with Synopsys experts as they discuss the future of AI-powered engineering. Synopsys sessions include:Reducing the Sim2Real Gap for Industrial Robotics: Srinivasa Mohan, Distinguished Engineer and Scientist at Synopsys, will discuss how Synopsys, ADI, and NVIDIA are accelerating physical AI development with digital twins.Monday, March 16 at 3:00 p.m., SJCC Grand Ballroom Theater (L2)Shaping the Future of Semiconductor Manufacturing With AI: Shankar Krishnamoorthy, Chief Product Development Officer at Synopsys, will discuss how AI and digital twins are reshaping semiconductor manufacturing — from EDA and computational lithography to the design and operation of advanced fabrication plants.Tuesday, March 17 at 10:00 a.m., SJCC 211AC (L2)Accelerating Quantum Chemistry on GPUs—Latest Advances: Anders Blom joins this talk to discuss how Gaussian-basis quantum chemistry on NVIDIA GPUs is primed to change the world. The session will overview new technologies and offerings from NVIDIA that help accelerate this paradigm shift.Tuesday, March 17 at 4:00 p.m., SJCC LL21E (LL)How Simulation and AI are Giving Life to Digital Twins for Patient Care: Dr. Mark Palmer, Field CTO and Lead Chief Technologist of Healthcare at Synopsys, will present on how the convergence of wearable devices, simulation, and AI will improve patient-specific care with digital twins.Wednesday, March 18 at 11:00 a.m., SJCC LL21AB (LL)Interactive CFD at the Cutting Edge: Experiencing Digital Twins and Urban Simulation with Omniverse: Akira Fujii, Principal Application Engineer at Synopsys, will present on how the integration of Ansys Fluent and NVIDIA Omniverse enables easier scenario verification for product development and urban planning.Wednesday, March 18 at 6:00 p.m., virtualAbout SynopsysSynopsys, Inc. (Nasdaq: SNPS) is the leader in engineering solutions from silicon to systems, enabling customers to rapidly innovate AI-powered products. We deliver industry-leading silicon design, IP, simulation and analysis solutions, and design services. We partner closely with our customers across a wide range of industries to maximize their R&D capability and productivity, powering innovation today that ignites the ingenuity of tomorrow. Learn more at www.synopsys.com.© 2026 Synopsys, Inc. All rights reserved. Synopsys, Ansys, the Synopsys and Ansys logos, and other Synopsys trademarks are available at https://www.synopsys.com/company/legal/trademarks-brands.html. Other company or product names may be trademarks of their respective owners.ContactsMedia            
Pete Smith
pete.smith@synopsys.com
corp-pr@synopsys.comInvestors        
Tushar Jain
synopsys-ir@synopsys.com










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Original: Synopsys Showcases NVIDIA Partnership Impact and Ecosystem Innovation at GTC 2026

Synopsys Introduces Software-Defined Hardware-Assisted Verification to Enable AI ProliferationMarch 11, 2026 12:00 PM
PR Newswire (US)

New product capabilities deliver leading performance, capacity, and industry-first hardware-assisted test-automation capabilities to accelerate AI silicon innovation from data center to edgeKey HighlightsSoftware-defined approach enables an up to 2x performance boost for ZeBu Server 5 and scales capacity up to 2x with modular HAV for AI-era mega designsNew HAPS-200 12 FPGA and ZeBu-200 12 FPGA platforms for mainstream designs feature EP-Ready Hardware that extends emulation and prototyping capacity by 2x and delivers leading performance for emulation and prototyping use cases New, industry-first hardware-assisted test automation capabilities enable faster, earlier detection of cache-coherency and subsystem-level bugs for maximum coverageSUNNYVALE, Calif., March 11, 2026 /PRNewswire/ -- Synopsys, Inc. (Nasdaq: SNPS) today announced advancements across its leading hardware-assisted verification (HAV) portfolio, including new hardware platforms and capabilities to support the ever-expanding demand for AI chip verification from the data center to the edge. Synopsys HAV platforms, powered by the company's unique software-defined capabilities, set new performance, scalability, and use case benchmarks for verifying the world's most sophisticated multi-die and AI chips amidst compounding design complexity and time-to-market requirements.







AI chip verification complexity is escalating rapidly as large language models continue to double in size roughly every four months, and interface data rates advance at a 2x rate every three years. Simultaneously, edge AI architectures are driving aggressive throughput, latency, and power-efficiency targets that further expand the design and validation workload. To keep pace, the industry requires HAV solutions to support broader application coverage and run quadrillions of verification cycles, enabling first-time-right silicon and a seamless ability to integrate heterogeneous AI systems."As AI-driven systems become more complex, verification must scale just as quickly. Hardware-assisted verification is no longer optional. It is critical to meeting aggressive time-to-market goals and ensuring silicon readiness," said Salil Raje, Senior Vice President and General Manager, Adaptive and Embedded Computing Group, AMD. "FPGA-based emulation and prototyping play a central role in that effort by accelerating system bring-up and enabling earlier software development. Our collaboration with Synopsys reflects that focus. Through joint optimization of Synopsys ZeBu with the AMD Vivado™ software stack, and by leveraging AMD EPYC™ processors for compute acceleration, we are reducing compile times and helping customers move to accurate system models faster.""As AI becomes more pervasive across almost every industry and products are now workload-optimized and silicon-powered, building high confidence early that the workloads are running to spec on the silicon under development is critical," said Ravi Subramanian, Chief Product Management Officer at Synopsys. "Our software-defined, hardware-assisted verification solutions deliver continuous innovation. They are a powerful force multiplier to scale verification productivity and meet the growing demand for pre-silicon development across industries."The latest advancements across Synopsys' software-defined hardware-assisted verification portfolio, include:Breakthrough performance and capacity for the AI era: The latest software-defined updates and modular HAV are available across the ZeBu and HAPS platforms. Of note, with these updates, the industry's highest capacity-scalable emulation platform, ZeBu Server 5, supports complex designs to meet the demands of mega designs supporting data center AI training and inference, GPU, custom accelerators, and networking IPU/DPU workloads. Modular HAV for HAPS enables the largest prototypes for software development, with further improvements for compute, storage, and bring-up capabilities.New HAPS and ZeBu platforms: The new HAPS-200 12 FPGA and ZeBu-200 12 FPGA systems address the complexity and high-performance requirements for data center-sub-system, mobile, client, server, consumer, and edge AI applications. They deliver 2x higher capacity compared to previous 6 FPGA platforms utilizing the flagship AMD Versal™ Premium VP1902 adaptive SoCs, offering EP-Ready Hardware-enabled configurability between prototyping and emulation. Synopsys also introduces the new HAPS-200 1 FPGA platform as a desktop system ideal for IP verification and software bring-up using Synopsys Interface Prototyping Kits."As NVIDIA's AI platforms have become software-defined to meet rising performance and scalability demands, verification must evolve in the same way," said Narendra Konda, Vice President, Hardware Engineering at NVIDIA. "Synopsys' software-defined hardware-assisted verification and the new HAPS-200 12 FPGA systems are accelerating our system-level verification and validation, helping us deliver complex AI platforms on aggressive schedules. And, Synopsys modular hardware-assisted verification enables deeper collaboration across our ecosystem."Software-defined HAV capabilities extend system lifetime value: Continuous software improvements deliver compounding performance gains, increased debug productivity, as well as additional use case capabilities for both new and installed systems. The Synopsys HAV portfolio supports new, industry-first Hardware-Assisted Test Solutions, test automation capabilities that allow teams to stress corner cases for processor, memory, and I/O subsystems as well as full-system coherency validation and observe system behavior under realistic workloads in emulation long before silicon is ready. For mixed-signal and system-level designs, Real-Number Models (RNM) emulation enables fast, scalable abstraction of analog behavior within digital-centric verification flows for faster software bring-up. For safety-critical and high-reliability designs, new fault emulation capabilities enable scalable fault injection and analysis across RTL simulation, emulation, and prototyping."Verifying hardware for our highly anticipated rack-scale AMD Helios solution – marked by massive AI scale, complex subsystems, and robust software stacks – demands scalable and versatile verification platforms," said Alex Starr, Corporate Fellow, AMD. "The Synopsys software-defined, HAV capabilities with EP-Ready Hardware are critical to how we perform CPU, GPU, and AI subsystems verification as well as full-system validation. Teams can also cover an expanded number of use cases in the pre-silicon phase, encompassing analog, digital, and software design verification using Real-Number Models (RNM) in emulation. As well, the flexibility to reconfigure and reuse hardware across projects and move seamlessly between emulation and prototyping as AI designs grow in both physical size and software stack volume are essential to delivering the high-performance, interoperable AI infrastructure at scale needed to meet the world's growing AI demands."Availability & Additional Resources
Software-defined enhancements are being rolled out continuously across the HAV portfolio, with the new capabilities available to users today. The new EP-Ready HAPS-200 12 FPGA and ZeBu-200 12 FPGA platforms are available today and in Q3 2026, respectively. HAPS-200 1 FPGA platform is available today.Product Page: Synopsys HAV Solutions Family   Blog: Introducing Software-Defined Hardware-Assisted Verification: A New Benchmark for AI-Era Chip Design Video: Software-Defined Hardware-Assisted Verification for the AI EraFollow Synopsys Converge 2026 News and Updates 
Synopsys Converge is taking place March 11-12, 2026, at the Santa Clara Convention Center. Follow news and updates as well as keynote details and replays via the Synopsys Converge Newsroom, on LinkedIn, and on X.About Synopsys
Synopsys, Inc. (Nasdaq: SNPS) is the leader in engineering solutions from silicon to systems, enabling customers to rapidly innovate AI-powered products. We deliver industry-leading silicon design, IP, simulation and analysis solutions, and design services. We partner closely with our customers across a wide range of industries to maximize their R&D capability and productivity, powering innovation today that ignites the ingenuity of tomorrow. Learn more at www.synopsys.com.© 2026 Synopsys, Inc. All rights reserved. Synopsys, Ansys, the Synopsys and Ansys logos, and other Synopsys trademarks are available at https://www.synopsys.com/company/legal/trademarks-brands.html. AMD EPYC, Versal, Vivado and combinations thereof are trademarks of Advanced Micro Devices, Inc. Other company or product names may be trademarks of their respective owners.Contacts
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View original content to download multimedia:https://www.prnewswire.com/news-releases/synopsys-introduces-software-defined-hardware-assisted-verification-to-enable-ai-proliferation-302711214.htmlSOURCE Synopsys, Inc.

Original: Synopsys Introduces Software-Defined Hardware-Assisted Verification to Enable AI Proliferation

Synopsys Outlines Vision for Engineering the FutureMarch 11, 2026 12:00 PM
PR Newswire (US)

Announces new design, verification and simulation solutions to re-engineer AI-powered product innovation at Synopsys Converge 2026Key HighlightsUnveiling Synopsys Multiphysics Fusion™ technology — the first in a broader roadmap of EDA solutions that integrate Synopsys and Ansys technologies for semiconductor designDemonstrating an industry-first L4 orchestrated, multi-agent design and verification workflow, powered by Synopsys AgentEngineer™ technologyLaunching the first major Ansys product release since acquisition, introducing new AI-driven multiphysics simulation, Synopsys technology integrations, and real-world digital twin technologies to transform simulation and analysis for smarter, more resilient systems Launching new hardware-assisted verification (HAV) platforms and unique, software-defined capabilities that set new performance, scalability, and flexibility benchmarks throughout the portfolioSUNNYVALE, Calif., March 11, 2026 /PRNewswire/ -- Today, Synopsys, Inc. (Nasdaq: SNPS) opened Synopsys Converge 2026, its new flagship conference, with a keynote by Synopsys president and CEO, Sassine Ghazi, who shared his vision for a new silicon-to-systems design paradigm for the era of pervasive intelligence — one that is silicon-powered, AI-enabled, and software-defined. He also announced new engineering solutions across Synopsys' expanded portfolio to advance how innovators design, verify, and deliver next generation AI-powered products.







"The complexity of next-generation intelligent systems requires a completely new engineering approach," said Ghazi. "By integrating co-design of software and hardware, electronics and physics, by harnessing digital twins to design, test, and refine products before physical production, and using AI to enhance human capabilities, customers' R&D teams can accelerate time to market of their intelligent systems. At Synopsys Converge, we're demonstrating the power of our silicon-to-systems engineering solutions that make us the best partner for engineering the future."Customers and partners such as AMD, Intel, Microsoft, and NVIDIA were featured during Ghazi's keynote, underscoring the need for co-design of hardware and software, silicon and systems. In addition, Synopsys, AMD and Microsoft are initiating a collaboration to enable faster access to Synopsys EDA tools on Microsoft platforms, powered by AMD compute. Below is a summary of announcements made at Synopsys Converge.Unveiling Multiphysics Fusion Technology: First Wave of Integrated Synopsys + Ansys Solutions for Chip DesignSynopsys announced Multiphysics Fusion technology and the first wave of EDA solutions that integrate Ansys golden multiphysics engines into Synopsys' leading EDA portfolio to solve today's pressing chip design problems caused by electromagnetics, thermal, and mechanical effects.Voltage drop, thermal effects, and electromagnetic coupling have become critical challenges for heterogeneous designs at advanced nodes, directly affecting performance and reliability. Integrating multiphysics analysis into the design flow helps teams identify and resolve issues earlier, with greater accuracy and better correlation to final signoff. This reduces design iterations and improves power, performance, and area (PPA) metrics — transforming the process from overdesign to co-design. The first solutions to incorporate Multiphysics Fusion technology address:Timing Signoff: Integrating voltage drop awareness and thermal analysis provides signoff for extreme operating conditions and stringent reliability requirements to accelerate time-to-signoff.Multi-Die Design: Offering thermal analysis and power integrity optimization across the full EDA stack from early floorplanning to signoff, in addition to high-speed auto-routing with AI-driven signal integrity optimization enables early thermal, IR, and stress analysis.Design Closure: Incorporating thermal and voltage-drop awareness speeds design closure via faster late-stage bug fixes, reducing design iterations, and improving PPA.Analog & Mixed Signal Design: Enabling greater electromagnetics accuracy and faster power integrity analysis for reliable analog design.These first Multiphysics Fusion capabilities are now in active beta engagements with early access customers with production availability expected in the coming months.Ushering in a New Chip Design Paradigm with AgentEngineer Technology Synopsys is pioneering AI capabilities with increasing levels of autonomy across its leading EDA solutions. Beginning with reinforcement learning, followed by generative AI capabilities delivered in Synospys.ai™, the company is now building an open agentic AI stack centered on orchestrated, multiagent workflows to address use cases from silicon to systems. Today, Synopsys unveiled an industry-first L4 agentic workflow for design and verification. Powered by AgentEngineer technology, the new adaptive learning, multi-agent orchestrated system demonstrates how agentic AI can augment human engineers and accelerate highly complex chip design tasks beyond traditional methods.The workflow features intelligent orchestration across multiple Synopsys EDA agents with adaptive learning to: generate Register Transfer Level (RTL) code from natural language and formal specification, run Lint checks to ensure clean RTL, generate unit-level testbenches, and finally iteratively run verification with EDA tools to converge on target objectives. This front-end design process typically takes a team of verification engineers four to six months for a large SoC design using traditional methods. The Synopsys AgentEngineer-powered workflow is already helping customers improve productivity by 2x, with improvements as high as 5x observed in select cases.Synopsys' agentic stack is built on industry standard SDKs and APIs to be interoperable with existing customer agents and data. The company is collaborating with industry leaders like AMD, Microsoft — including its Foundry and Discovery platforms, and NVIDIA to develop differentiated, agentic capabilities with increasing levels of autonomy over time. Synopsys is currently engaging with customers on this first multi-agent workflow and is committed to delivering additional, orchestrated, multi-agent workflows for the entire design-to-manufacturing flow. To see the new design and verification workflow in action, watch:  Accelerate Innovation with First Orchestrated Multi-Agent Workflow for Chip Design.Synopsys Launches the First Major Ansys Product Release Since AcquisitionSynopsys today introduced the latest updates to the industry's deepest and broadest simulation portfolio, which feature integrated workflows across materials intelligence, functional safety, photonics design, and embedded systems. Marking the first major Ansys product release since the acquisition closed, Ansys 2026 R1 delivers:New agentic and generative AI simulation capabilities, with the new Mesh Agent feature in Ansys Mechanical™ software; Ansys GeomAI, a new solution for generating, evaluating, and refining geometry concepts; and Discovery Validation Agent, an agentic AI partner that can proactively identify setup issues using contextual intelligence and industry best practices.Synopsys technology integrations including Synopsys VC Functional Safety Manager (VC FSM) and Ansys medini® analyze™ software, creating an end-to-end workflow linking system- and chip-level safety analysis to automate traceability and eliminate manual data sharing; Synopsys QuantumATK® and the Ansys Granta MI® platform to integrate atomic-scale materials modeling with enterprise materials management to create consistent, simulation-ready materials records; and Synopsys OptoCompiler™ and Ansys Lumerical FDTD™ software, connecting photonic device design to system-level optical simulation with automated Verilog-A model generation and consistent optical behavior.Enhancements across Synopsys' simulation and analysis solutions enable engineers to harvest trusted simulation results with more speed and precision, further shrinking the gap between simulation and physical testing. To learn more, read the press release: Synopsys Launches Ansys 2026 R1 to Re-Engineer Engineering with Joint Solutions and AI-Powered Products.Introducing New Software-Defined Hardware-Assisted Verification to Enable AI ProliferationSynopsys announced advancements across its industry-leading hardware-assisted verification (HAV) portfolio for customers to keep pace with continued, unprecedented demand for AI compute and related verification productivity to deliver multi-die and AI chips from the data center to the edge. Powered by the company's unique software-defined capabilities, Synopsys' HAV platforms set new performance, scalability, and flexibility benchmarks throughout the portfolio.The company's software-defined approach provides up to 2x higher performance on ZeBu Server 5 and up to 2x capacity scaling for modular HAV systems targeting AI-era mega designs. Synopsys also launched the HAPS-200 12 FPGA and ZeBu-200 12 FPGA platforms for mainstream designs, offering EP-Ready Hardware, 2x capacity, and continued leadership in software/hardware validation, power/performance analysis, and RTL verification. New, industry-first test automation enables faster, earlier detection of cache-coherency and subsystem-level bugs. Synopsys is showcasing new HAV engines at Converge. Learn more here.Launching Electronics Digital Twin Platform to Accelerate Physical AI System Development Also, this week at Embedded World, Synopsys announced the Electronics Digital Twins (eDT) Platform. The eDT Platform enables an end-to-end digital twin foundation to help engineering teams connect silicon designs to software behavior and full-system validation from the earliest stages of development. The eDT Platform brings together the company's product and market leadership supplying virtual SoC models and large-scale system simulations, along with its extensive partner ecosystem, to simplify, accelerate, and scale the development of physical AI systems.Initially focused on automotive use cases, the eDT Platform enables OEMs to achieve up to 90% of software validation prior to hardware availability by shifting software development and system integration "left," reducing vehicle development cost and time-to-market. Synopsys is demonstrating the new eDT Platform at Converge. Learn more here.Follow Synopsys Converge 2026 News and Updates Synopsys Converge is taking place March 11-12, 2026, at the Santa Clara Convention Center. Watch Sassine Ghazi's opening keynote and follow related news via the Synopsys Converge Newsroom, on LinkedIn, and on X.About SynopsysSynopsys, Inc. (Nasdaq: SNPS) is the leader in engineering solutions from silicon to systems, enabling customers to rapidly innovate AI-powered products. We deliver industry-leading silicon design, IP, simulation and analysis solutions, and design services. We partner closely with our customers across a wide range of industries to maximize their R&D capability and productivity, powering innovation today that ignites the ingenuity of tomorrow. Learn more at www.synopsys.com.© 2026 Synopsys, Inc. All rights reserved. Synopsys, Ansys, the Synopsys and Ansys logos, and other Synopsys trademarks are available at https://www.synopsys.com/company/legal/trademarks-brands.html. Other company or product names may be trademarks of their respective owners.Contacts
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Kelli Wheeler: kelliw@synopsys.com
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Original: Synopsys Outlines Vision for Engineering the Future

Synopsys Launches Ansys 2026 R1 to Re-Engineer Engineering with Joint Solutions and AI-Powered ProductsMarch 11, 2026 12:00 PM
PR Newswire (US)

Release combines AI, multiphysics simulation, and real-world digital twin technology to transform how teams explore designs, validate earlier, and engineer smarter, more resilient systemsKey Highlights Delivers unified Synopsys-Ansys workflows that bring together previously separate engineering processes to create more cohesive and efficient product developmentAdvances generative AI and first agentic engineering capabilities that speed design exploration, automate preprocessing, and enable faster, system-level insightEnhances system-level engineering with expanded digital twin capabilities and connected modeling workflows that deliver deeper real-world insight across complex systemsSUNNYVALE, Calif., March 11, 2026 /PRNewswire/ -- Synopsys, Inc. (NASDAQ: SNPS) today launched Ansys 2026 R1, delivering the first wave of integrated Synopsys-Ansys capabilities built on nearly a century of combined engineering expertise. The release also expands the Ansys simulation AI portfolio with a new, AI-enhanced training offering designed to make learning more effective and efficient, along with advanced AI features that help engineering teams gain earlier system-level insight, reduce reliance on physical testing, and optimize performance across increasingly complex, software-defined products.



"The transition to intelligent, interconnected systems is driving the need for faster, physics-first, system-level design," said Ravi Subramanian, Chief Product Management Officer at Synopsys. "By bringing Synopsys and Ansys technologies together, we're moving beyond point-to-point connections to create a unified fabric that links materials, physics, electronics, and software into a seamlessly orchestrated design environment. Synopsys enables organizations to move from concept to reality with extreme speed, empowering engineering teams and customers to innovate with confidence."Joint Solutions Accelerating the Future of Systems-Aware EngineeringAnsys 2026 R1 marks the beginning of a new era for engineering shaped by rising system complexity, AI-driven product demands, and the industry's shift to early validation. To meet these pressures, Synopsys introduces targeted, system-aware integrations between select Synopsys and Ansys technologies, delivering high-impact workflows that accelerate early exploration, improve cross-domain collaboration, and provide deeper insight across key industries.New Synopsys-Ansys joint solutions delivered in the Ansys 2026 R1 release include:Synopsys VC Functional Safety Manager (VC FSM) and Ansys medini® analyze™ software are now connected by an end-to-end safety workflow that links system-level and silicon-level safety analysis. The integration streamlines collaboration among system safety and chip safety verification engineers by automating traceability from systems to chip. The workflow also eliminates manual data sharing processes between tools, saving time for critical applications in automotive and aerospace safety.Synopsys QuantumATK® and the Ansys Granta MI® platform are integrated for an atomic-scale-to-enterprise materials workflow that supports material discovery, novel material development, and manufacturing process improvement. The integration streamlines collaboration among materials scientists and design engineers by enabling direct export of simulation-ready, validated material properties into Granta MI. This repeatable workflow creates curated, consistent materials records that help teams predict performance earlier and make more data-driven decisions.Synopsys OptoCompiler™ and Ansys Lumerical FDTD™ software are integrated to create a design workflow connecting device-level photonic design with advanced system-level optical simulation. The integration improves collaboration between device designers and system-level photonic engineers by automating Verilog-A model generation and ensuring consistent optical behavior across tools. The workflow also eliminates manual data translation between design and simulation environments, saving time and improving reliability for advanced photonic applications.In addition to the Ansys SCADE® model-based software development solution, Synopsys offers TPT, a robust test automation solution for control software. Together, these synergistic technologies help customers strengthen their development workflows, streamline verification, and accelerate the delivery of high-quality, reliable embedded systems. SCADE delivers a rigorous, safety-critical software development environment, and TPT enables automated test generation, execution, and analysis — empowering teams to accelerate iteration, strengthen early validation, and improve the quality of complex control software. Both solutions combined can reduce manual verification effort and increase automation for customers building mission-critical control systems across domains, including advanced driver assistance, electrified powertrains, flight control, engine control, and avionics systems."Modern automotive microcontrollers and processors integrate increasing levels of functionality, safety mechanisms, and configurability," said Tina Lamers, VP Global Safety at NXP Semiconductors. "Their contribution to system safety can only be fully understood when device-level safety analysis is seamlessly integrated into ECU and vehicle-level safety concepts. This makes functional safety a shared responsibility across silicon vendors, tier 1 suppliers, and original equipment manufacturers (OEMs)."Drive Earlier, Smarter Design Iteration with AI-Powered Digital EngineeringAnsys 2026 R1 introduces generative AI and the portfolio's first agentic capabilities, bolstering an AI-enhanced portfolio that accelerates validation, speeds design exploration, and automates complex workflows — empowering engineering teams with smarter, faster insight at every stage of development.Ansys GeomAI platform for geometry introduces a generative AI-driven approach to conceptual design exploration, enabling engineering teams to rapidly generate, evaluate, and refine geometry concepts with greater creativity and efficiency. By learning directly from reference designs, GeomAI helps engineers accelerate early-stage innovation while preserving engineering intent to ensure AI-generated concepts remain predictable, reliable, and ready for downstream validation.In addition, Mesh Agent, a new feature in Ansys Mechanical™ software available for exploratory use, helps engineers debug and resolve meshing failures during model pre-processing. The agentic feature guides engineers with proven, validated remediation steps to increase confidence in automated pre-processing.Now advancing through early customer evaluations, the Discovery Validation Agent in Ansys Discovery™ software applies agentic AI grounded in decades of engineering expertise to proactively identify setup issues using contextual intelligence and industry best practices, empowering engineers to confidently move faster, avoid costly mistakes, and achieve higher-performing designs from the start.More AI updates in Ansys 2026 R1 include:The Ansys SimAI™ platform for simulation now features two offerings: the original product, Ansys SimAI Premium SaaS, and Ansys SimAI Pro, built for desktop access for projects that require local data storage.Ansys SimAI connectors in Ansys optiSLang® software allow an end-to-end workflow, from training data generation, AI training, and AI use for optimization and design studies.Ansys Engineering Copilot™ is now available in Ansys medini analyze, Ansys ModelCenter®, and Ansys Rocky™ software, delivering intelligent, AI-guided assistance directly within the user interface.A new integration between optiSLang and Discovery creates a streamlined, AI-ready workflow for rapid sensitivity analysis and one-click optimization, helping engineers explore design alternatives early before validating concepts in Mechanical, Fluent, or Ansys Icepak® software."Ansys simulation metamodeling is transforming the way we approach power-grid design," said Venu Kondapalli, Vice President, Silicon Design Engineering at Altera. "Altera is always pathfinding on latest AI models. By combining machine-learning insights on optiSLang with fast, guided optimization, we can quickly pinpoint the right balance of metal resources while maintaining power-grid integrity and reliability. This lets us converge place-and-route faster, reduce costly design iterations, and move to closure with far greater confidence."Connect Systems and Optimize Performance with Real World Digital TwinsR1's expanded digital twin innovations give organizations deeper real-world insight before physical prototyping. Ansys TwinAI™ software introduces new fusion modeling methods that better align simulation data with sensor and test information, along with a temporal fusion transformer that strengthens large-scale time-series modeling and training efficiency. A new TwinAI reduced-order model (ROM) wizard guides teams through the creation and deployment of high-fidelity ROMs, accelerating the delivery of real-time digital twins. In addition, enhancements to Ansys AVxcelerate Sensors™ software, including a new GPU-accelerated multispectral light-propagation engine and expanded NVIDIA Omniverse integration, create a unified, 3D digital twin pipeline, more physically accurate camera behavior, surface reflections, and edge-case realism across scenarios."Ansys reduced-order modeling techniques — including linear time-invariant (LTI) and linear parameter-varying (LPV) methods — are essential to building our digital twin," said Dr. Bogdan C. Ionescu, Senior Principal Key Expert in the Power Electronics Group at Innomotics. "This digital twin runs extremely fast and gives us critical insight into quantities we cannot measure directly, such as the internal temperatures of insulated gate bipolar transistors inside power cells. By delivering these results in real time, the digital twin can provide the drive controller with the information needed to operate safely and efficiently."Additional digital twin, model-based systems engineering (MBSE), and digital engineering updates include:Ansys CoSim, a new distributed co-simulation product, connects multiple system-level tools in a coordinated workflow that lets each subsystem run in its native environment while exchanging data seamlessly. Its synchronization algorithms enable independent timesteps for fast, accurate multiphysics validation, improving interoperability and accelerating system-level analysis across system simulation, MBSE, and autonomous development.Ansys HFSS-PI introduces a new broadband 3D power integrity simulation capability with the performance required to overcome today's IC, package, and board power-delivery challenges. Purpose-built for next-generation chip-package integration, higher-density layouts, and advanced 3D packaging, HFSS-PI enables large-scale 3D power integrity analysis with deep insight into complex coupling mechanisms and return-path behavior.An enhanced connection between Ansys System Architecture Modeler (SAM)™, a SysML v2 web platform, and Ansys ModelCenter automates execution of SysML v2 model expressions alongside external analysis tools — eliminating the need to manually translate hundreds of expressions into scripts and allowing teams to accelerate requirement verification and design-space exploration.Embedded software development teams can now import Ansys SCADE Display® design tool models directly into Ansys Systems Tool Kit® (STK®) software, enabling display behavior to relate to mission-level elements for high-fidelity, system-in-the-loop assessment.Updates to Ansys HFSS-IC™ platform include a Synopsys user interface that replaces legacy workflows and delivers the speed and capacity needed to import die-scale and interposer-level designs. The modern UI also enables direct OpenAccess-based design import for single- and multi-die simulations, streamlining interoperability and boosting IC-designer productivity.Ansys FreeFlow™ software expands its capabilities with a powerful meshless computational fluid dynamics approach that delivers fast, robust performance without the need for traditional meshing for complex free-surface flows, spray behavior, and dynamic liquid interactions.Antenna Wizard, a new feature in STK available for early adoption, streamlines antenna modeling with fast, automated setup. It can quickly generate high-fidelity antenna representations to guide early mission analysis and provide antenna engineers with a strong starting point for detailed Ansys HFSS™ software design.Follow Synopsys Converge 2026 News and Updates
Synopsys Converge is taking place March 11-12, 2026, at the Santa Clara Convention Center. Follow news and updates as well as keynote details and replays via the Synopsys Converge Newsroom, on LinkedIn, and on X.About SynopsysSynopsys, Inc. (Nasdaq: SNPS) is the leader in engineering solutions from silicon to systems, enabling customers to rapidly innovate AI-powered products. We deliver industry-leading silicon design, IP, simulation and analysis solutions, and design services. We partner closely with our customers across a wide range of industries to maximize their R&D capability and productivity, powering innovation today that ignites the ingenuity of tomorrow. Learn more at www.synopsys.com. © 2026 Synopsys, Inc. All rights reserved. Synopsys, Ansys, the Synopsys and Ansys logos, and other Synopsys trademarks are available at https://www.synopsys.com/company/legal/trademarks-brands.html. Other company or product names may be trademarks of their respective owners.Contacts
Media
Kelli Wheeler: kelli.wheeler@synopsys.com
Pete Smith: pete.smith@synopsys.com
corp-pr@synopsys.com










View original content to download multimedia:https://www.prnewswire.com/news-releases/synopsys-launches-ansys-2026-r1-to-re-engineer-engineering-with-joint-solutions-and-ai-powered-products-302711215.htmlSOURCE Synopsys, Inc.

Original: Synopsys Launches Ansys 2026 R1 to Re-Engineer Engineering with Joint Solutions and AI-Powered Products

Synopsys Launches Electronics Digital Twin Platform to Accelerate Physical AI System DevelopmentMarch 10, 2026 12:00 AM
PR Newswire (US)

Open platform enables seamless integrations with a comprehensive technology ecosystem and cloud-based deployment to improve engineering collaboration and speed time-to-market for intelligent systemsKey HighlightsOpen platform to create, deploy, manage, and use electronics digital twins, establishing a new integrated and collaborative engineering paradigm across electronics, software, and systemsPre-integrated Synopsys and ecosystem partner solutions, combined with management and administration capabilities, provide teams ready-to-use, cloud-based environments that reduce development costs, increase product quality, and accelerate innovationInitially focused on high-value automotive use cases, the platform enables OEMs to achieve up to 90% of software validation prior to hardware availability — significantly shrinking vehicle development cyclesSUNNYVALE, Calif., March 10, 2026 /PRNewswire/ -- Synopsys, Inc. (NASDAQ: SNPS) today launched the Synopsys Electronics Digital Twin (eDT) Platform, a first-of-its-kind, open solution to accelerate the creation, management, deployment, and use of electronics digital twins (eDTs) critical for today's software-defined product development enabling physical AI systems. Initially focused on high-value automotive use cases, the eDT Platform enables OEMs to achieve up to 90% of software validation prior to hardware availability by shifting software development and system integration "left," reducing vehicle development cost and time-to-market.







"Volvo Cars is rapidly adopting holistic, whole-vehicle validation, and we're bringing that rigor into the earliest stages of design and development," Johannes Foufas, Technical Manager, Software Factory, Volvo Cars. "Core to this transformation is our pioneering use of electronics digital twins working with Synopsys. With virtualized ECUs, our teams can 'shift left' test and validation before hardware exists, enabling us to reduce development cost, increase software quality, and accelerate innovation throughout the lifecycle of our vehicles.""Automotive engineering teams are at their breaking point with more than 600 million lines of software, hundreds of software suppliers, rapidly shrinking development cycles, and mounting cost pressures," said Ravi Subramanian, Chief Product Management Officer. "Intelligent system development from vehicles to AI factories, requires a fundamentally different approach — one that connects silicon designs to software behavior and full-system validation from the earliest stages of development. With the new eDT Platform, Synopsys is transforming engineering with an end-to-end digital twin foundation, bringing together our product and market leadership supplying virtual SoC models and large-scale system simulations, along with our extensive partner ecosystem, to simplify, accelerate, and scale the development of next-generation vehicles."Accelerate the Path to Production-Ready Software and Systems with eDT LabsThe platform enables users to configure cloud-based eDT Labs, a collection of pre-integrated assets includingSynopsys technologies, open-ecosystem tools, models, software, and scalable compute for high-value automotive use cases such as:Early customer evaluation of new System-on-Chip or Microcontrollers: Frictionless access to early virtual prototypes reduces time-to-selection decision.Early customer start-of-software development: Shift-left milestones by starting software development well before hardware availability with pre-integrated tools support.Collaborative software development: Enable seamless collaboration between customer teams, suppliers and tool vendors to accelerate time to market.System validation: Integration in continuous integration/testing workflows with rapid provisioning of eDTs reduces validation effort while improving software quality.Simplify Creation, Deployment, and Management of eDT LabsThe eDT Platform includes Synopsys and partner capabilities that can be used to establish eDT Labs such as:Synopsys' leading virtualization and AI technologies, along with advanced debug, test tools, ecosystem integration, and blueprints to rapidly build and validate eDTs.System composition using the open-source SIL Kit by Vector and Synopsys, enabling teams to rapidly assemble and connect virtual ECUs, models, and software components.A broad set of pre-integrated ecosystem partner technologies including silicon models; simulation, debug and analysis tools; and software IP; among others.In addition, eDT Labs can be deployed and managed easily using platform capabilities, including:Provisioning: The platform provides a comprehensive set of features such as role-based user management, secure access and encryption, administrative analytics, global license provisioning, and a workflow editor.User interfaces, applications, and APIs (CLI and TEST APIs) to integrate with commercial and customer software factory solutions.Flexible compute options: With SaaS or BYOC deployment options, the eDT Platform leverages flexible compute in the cloud. For example, it can be powered by AWS cloud infrastructure and AWS Graviton4 processors delivering the computational performance and flexibility required for modern automotive development."As compute systems grow in complexity, a virtual-first validation approach is essential to improving efficiency and speeding time-to-market for safe, reliable physical AI platforms," Suraj Gajendra, Vice President of Products and Solutions, Physical AI Business Unit, Arm. "With Synopsys' eDT Platform, developers can access a pre-integrated Arm Zena CSS virtual platform in Synopsys Virtualizer and take advantage of Arm-on-Arm hardware-assisted virtualization, using ISA parity and software binary compatibility to validate rich workloads and production software stacks earlier.""Validating complex automotive software traditionally required expensive physical prototypes and took years," said Ozgur Tohumcu, General Manager of Automotive and Manufacturing at AWS. "AWS and Synopsys have fundamentally changed that equation. Our Graviton4 processors deliver breakthrough performance for virtual vehicle testing, while our global cloud infrastructure provides the scale automotive teams need. Together, we're helping customers compress 3-4 year development cycles into a fraction of that—a game-changer for the industry.""Software-defined vehicles are reshaping how automotive systems are designed, validated, and operated. As software and AI become the dominant value drivers, the industry must move toward scalable, platform-based development approaches," said Gavin C. Rogers, Senior Vice President at Vector. "By combining Synopsys' electronics digital twin platform with Vector's automotive-proven software platforms and software factory, we are jointly enabling a seamless, software-first development workflow across the entire vehicle lifecycle. Together, we empower automotive customers to industrialize software development, shorten time to market, and sustain continuous innovation at scale."Availability and Additional Resources
Customers interested in deploying an electronics digital twin can engage with Synopsys regarding the eDT Platform today. For more information, visit: https://www.synopsys.com/edt.Industry Support for the Synopsys eDT Platform: https://news.synopsys.com/synopsys-electronics-digital-twin-platform-industry-support  Blog: Unveiling the Synopsys Electronics Digital Twin (eDT) PlatformVideo: Synopsys Electronics Digital Twin Platform for Physical AI System DevelopmentJoin Synopsys at Embedded World 2026
Visit Synopsys during Embedded World 2026 at Stand 4-208 for discussions about the company's engineering solutions, including demos of the eDT Platform powered by AWS Graviton4.Follow Synopsys Converge 2026 News and Updates
Synopsys Converge is taking place March 11-12, 2026, at the Santa Clara Convention Center. Attend Synopsys President and CEO Sassine Ghazi's opening keynote via livestream on March 11 at 9:00amPT via the Synopsys Converge Newsroom. Follow all company news and updates via the Synopsys Newsroom, on LinkedIn, and on X.About Synopsys
Synopsys, Inc. (Nasdaq: SNPS) is the leader in engineering solutions from silicon to systems, enabling customers to rapidly innovate AI-powered products. We deliver industry-leading silicon design, IP, simulation and analysis solutions, and design services. We partner closely with our customers across a wide range of industries to maximize their R&D capability and productivity, powering innovation today that ignites the ingenuity of tomorrow. Learn more at www.synopsys.com.© 2026 Synopsys, Inc. All rights reserved. Synopsys, Ansys, the Synopsys and Ansys logos, and other Synopsys trademarks are available at https://www.synopsys.com/company/legal/trademarks-brands.html. Other company or product names may be trademarks of their respective owners.Contacts
Media 
Kelli Wheeler: kelliw@synopsys.com
Pete Smith: pete.smith@synopsys.com
corp-pr@synopsys.com 










View original content to download multimedia:https://www.prnewswire.com/news-releases/synopsys-launches-electronics-digital-twin-platform-to-accelerate-physical-ai-system-development-302708812.htmlSOURCE Synopsys, Inc.

Original: Synopsys Launches Electronics Digital Twin Platform to Accelerate Physical AI System Development

Synopsys Initiates $250 Million Accelerated Share Repurchase AgreementMarch 2, 2026 9:00 AM
PR Newswire (US)

SUNNYVALE, Calif., March 2, 2026 /PRNewswire/ -- Synopsys, Inc. (Nasdaq: SNPS) today announced that it has entered into an accelerated share repurchase agreement (ASR) with The Bank of Nova Scotia to repurchase an aggregate of $250 million of Synopsys stock.







Under the terms of the ASR, Synopsys will receive an aggregate initial share delivery of approximately 513,000 shares, with the remainder, if any, to be settled on or before June 1, 2026, upon completion of the repurchases. The specific number of shares that Synopsys ultimately repurchases under the ASR will be based on the average of Synopsys' daily volume-weighted average share prices during the repurchase period, less a discount.About Synopsys
Synopsys, Inc. (Nasdaq: SNPS) is the leader in engineering solutions from silicon to systems, enabling customers to rapidly innovate AI-powered products. We deliver industry-leading silicon design, IP, simulation and analysis solutions, and design services. We partner closely with our customers across a wide range of industries to maximize their R&D capability and productivity, powering innovation today that ignites the ingenuity of tomorrow. Learn more at?www.synopsys.com.? © 2026 Synopsys, Inc. All rights reserved. Synopsys, Ansys, the Synopsys and Ansys logos, and other Synopsys trademarks are available at https://www.synopsys.com/company/legal/trademarks-brands.html. Other company or product names may be trademarks of their respective owners.Forward-Looking Statements
This press release contains certain forward-looking statements regarding the expected settlement of the ASR. These statements involve risks, uncertainties, and other factors that could cause our actual results, timeframes, or achievements to differ materially from those expressed or implied in such forward-looking statements. Such risks, uncertainties and factors include but are not limited to the market price of Synopsys common stock during the repurchase period; the ability of The Bank of Nova Scotia to buy or borrow shares of Synopsys common stock; the impact of global and regional economic and market conditions, including illiquidity and other risks of instability in the banking and financial services industry; and the risks more fully described in filings Synopsys makes with the SEC from time to time, including in the sections entitled "Risk Factors" in Synopsys' latest Annual Report on Form 10-K and latest Quarterly Reports on Form 10-Q. Synopsys undertakes no duty to, and does not intend to, update any forward-looking statement, whether as a result of new information, future events or otherwise, unless required by law.INVESTOR CONTACT:
Tushar Jain
Synopsys, Inc.
650-584-4289
Synopsys-ir@synopsys.comEDITORIAL CONTACT:
Cara Walker
Synopsys, Inc.
650-584-5000
corp-pr@synopsys.com










View original content to download multimedia:https://www.prnewswire.com/news-releases/synopsys-initiates-250-million-accelerated-share-repurchase-agreement-302700527.htmlSOURCE Synopsys, Inc.

Original: Synopsys Initiates $250 Million Accelerated Share Repurchase Agreement

Innatera Selects Synopsys Simulation to Scale Brain-Inspired Processors for Edge DevicesMarch 2, 2026 3:00 AM
PR Newswire (US)

Innatera adopts Synopsys simulation technology to help design neuromorphic chips that enable low-power AI for wearables, smart home devices, and digital twin industrial sensors Key Highlights Synopsys helps Innatera design chips that enable real-time, energy-efficient AI processing at the edge, catalyzing the development of next-generation applications in physical AISynopsys PathFinder-SC™ signoff solution delivers improved precision for more accurate layout-level outcomes, expertly manages design requirements, and enables early-phase analysisSynopsys Totem™ power integrity platform enables transistor-level analysis for reliable power delivery and performance optimization for ultra-low-power AI processorsSUNNYVALE, Calif., March 2, 2026 /PRNewswire/ -- Innatera, the leader in brain-like neuromorphic computing for ultra-low-power intelligence at the sensor edge, selected Synopsys, Inc. (NASDAQ: SNPS) for design and validation of its next-generation neuromorphic microcontrollers. Synopsys' reliable solutions for electrostatic discharge (ESD) and power integrity analysis will help Innatera scale its operations to meet the growing demand for edge processing in industrial sensors, robotics, wearables, and smart home technologies.







Neuromorphic microcontrollers process information through Spiking Neural Networks (SNNs) that mimic how biological neurons communicate, delivering brain-inspired intelligence at the sensor edge. This event-driven approach enables real-time, ultra-low-power operation in sensor-rich environments where responsiveness and energy efficiency are critical. Innatera's architecture combines mixed-signal analog computation, dense interconnects, and low-voltage design — key enablers of efficiency but potential sources of electrical noise and ESD sensitivity. To address these challenges and ensure robust performance across complex neuromorphic circuits, Innatera leverages PathFinder-SC and Totem to validate power integrity, manage noise coupling, and maintain reliability without compromising speed or efficiency. PathFinder-SC simulates ESD events at scale, identifying vulnerabilities and root causes before the final design goes to manufacturing and ensuring chips are functioning optimally against real-world electrostatic occurrences. It also provides early, high-fidelity modeling of analog behavior, empowering designers to validate performance under diverse conditions.Totem performs detailed power integrity analysis at the transistor level, ensuring reliable power delivery and optimal performance for highly efficient AI tasks. By pairing Totem's high-fidelity modeling of typical operating conditions with PathFinder-SC's capacity to identify and address ESD risks, the solution provides designers with a comprehensive reliability tool — one that protects against both expected and unexpected electrical challenges throughout the chip's life cycle and is backed by robust technical support."Innatera's mission to redefine edge AI through neuromorphic computing requires both technological innovation and reliable design collaboration," said Aditya Dalakoti, director of SoC and mixed-signal at Innatera. "Synopsys stood out for its leading technology and unwavering support for startups in the edge AI ecosystem. Its ESD analysis solution and collaborative approach enable us to scale into real-world, adaptive applications with enhanced speed, usability, and versatility."For example, Innatera used Synopsys technology to validate the design of Pulsar, the world's first commercial neuromorphic microcrontroller. Pulsar optimizes AI workloads at the edge by combining flexible computing architecture, resulting in up to 100x lower latency and 500x lower energy consumption than conventional AI processors. Using SNNs, Pulsar only reacts to registered sensor changes, significantly improving data transfer speeds and battery power for "always-on" devices like wearables and smart sensors."By enabling Innatera to accelerate product development and scale confidently, Synopsys reinforces its role as a catalyst for cutting-edge technologies shaping the future of embedded AI," said Prith Banerjee, senior vice president at Ansys, part of Synopsys. "This collaboration underscores our commitment to empowering innovation across the semiconductor ecosystem, from global enterprises to emerging startups. As edge computing becomes increasingly central to real-time intelligence, Synopsys simulation is helping innovators bring efficient AI where it's most needed."About SynopsysSynopsys, Inc. (Nasdaq: SNPS) is the leader in engineering solutions from silicon to systems, enabling customers to rapidly innovate AI-powered products. We deliver industry-leading silicon design, IP, simulation and analysis solutions, and design services. We partner closely with our customers across a wide range of industries to maximize their R&D capability and productivity, powering innovation today that ignites the ingenuity of tomorrow. Learn more at www.synopsys.com.© 2026 Synopsys, Inc. All rights reserved. Synopsys, Ansys, the Synopsys and Ansys logos, and other Synopsys trademarks are available at https://www.synopsys.com/company/legal/trademarks-brands.html. Other company or product names may be trademarks of their respective owners.ContactsMedia
Pete Smith
pete.smith@synopsys.com
corp-pr@synopsys.com  










View original content to download multimedia:https://www.prnewswire.com/news-releases/innatera-selects-synopsys-simulation-to-scale-brain-inspired-processors-for-edge-devices-302700138.htmlSOURCE Synopsys, Inc.

Original: Innatera Selects Synopsys Simulation to Scale Brain-Inspired Processors for Edge Devices

Synopsys Announces Earnings Release Date for First Quarter Fiscal Year 2026January 27, 2026 9:05 PM
PR Newswire (US)

SUNNYVALE, Calif., Jan. 27, 2026 /PRNewswire/ -- Synopsys, Inc. (Nasdaq: SNPS) today announced it will report results for the first quarter fiscal year 2026 on Wednesday, February 25, 2026, after market close. The company will host a conference call at 2:00 p.m. Pacific Time / 5:00 p.m. Eastern Time to review its financial results and business outlook.







Financial and other statistical information to be discussed on this conference call will be available on the corporate website at www.investor.synopsys.com immediately before the call. A live webcast will also be available on this site. Participants should access the live webcast at least 10 minutes prior to the start of the call. A webcast replay will be available beginning February 25, 2026, at approximately 5:00 p.m. PT. The replay will be available until Synopsys announces its second quarter fiscal year 2026 results.About Synopsys
Synopsys, Inc. (Nasdaq: SNPS) is the leader in engineering solutions from silicon to systems, enabling customers to rapidly innovate AI-powered products. We deliver industry-leading silicon design, IP, simulation and analysis solutions, and design services. We partner closely with our customers across a wide range of industries to maximize their R&D capability and productivity, powering innovation today that ignites the ingenuity of tomorrow. Learn more at www.synopsys.com. © 2026 Synopsys, Inc. All rights reserved. Synopsys, Ansys, the Synopsys and Ansys logos, and other Synopsys trademarks are available at https://www.synopsys.com/company/legal/trademarks-brands.html. Other company or product names may be trademarks of their respective owners.Investor Contact:
Christine Salvi-Sullivan
Synopsys, Inc.
(650) 584-1901Editorial Contact:
Cara Walker
Synopsys, Inc.
650-584-5000
corp-pr@synopsys.com










View original content to download multimedia:https://www.prnewswire.com/news-releases/synopsys-announces-earnings-release-date-for-first-quarter-fiscal-year-2026-302671564.htmlSOURCE Synopsys, Inc.

Original: Synopsys Announces Earnings Release Date for First Quarter Fiscal Year 2026

$SNPS: Destroyeddddddddddd.... now $410

WOW............ PUTS are up 130k % !!!!!!!!!!!!

MASSIVE


GO $SNPS

Geopolitics strike again. SMH!!!
On May 29, 2025, following the announcement of Synopsys' financial results of its second fiscal quarter ended April 30, 2025, Synopsys received a letter from the Bureau of Industry and Security of the U.S. Department of Commerce informing Synopsys of new export restrictions related to China (the "BIS Letter"). Synopsys is currently assessing the potential impact of the BIS Letter on its business, operating results and financial condition.
https://www.reuters.com/business/synopsys-suspends-annual-quarterly-forecasts-2025-05-29/

SNPS reports May 28

SNPS, one year chart

SNPS 10Q due AUGUST 21

Strong chart. Keep it up.

SNPS new 52 week high

SNPS new 52 week high

SNPS new 52 week high

SNPS new 52 week high

SNPS new 52 week high

SNPS new 52 week high

SNPS new 52 week high

SNPS new 52 week high

SNPS new 52 week high

So if Lightwave Logics Patented Polymer is applied to the PIC structure that was just announced here it Triples the modulation speed of Silicon Photonics and only requires 1/2 the power of todays devices. LWLGs polymer is so sensitive that it does not require a booster on the electrical side (not to be confused with "optical booster" Basically the voltage in the 1's and 0's is enough to to embed data in the Laser that may be produced by Synopsys on the "PIC"

I think we are onto something, do I smell another piece of this puzzle to be announced here? Lightwave recently also hired a V.P. to develop PDKs with the Foundries.

X

X

JUST IN: $SNPS Synopsys $SNPS Trading Report

The Synopsys (NASDAQ: SNPS) update and the technical summary table below can help you manage risk and optimize returns. Here we provide day, swing, and longer-term trading plans for SNPS, and we cover 1000 other stocks too. This is a snapshot, it was real-time when the report was publis...

Read the whole news SNPS - Synopsys $SNPS Trading Report

News: $SNPS Synopsys IC Validator, Running on AMD EPYC Processor Powered Azure Virtual Machines, Verifies AMD Radeon Pro VII GPU Design in Under Nine Hours

MOUNTAIN VIEW, Calif. , Aug. 20, 2020 /PRNewswire/ -- Highlights: Cloud-optimized IC Validator scales physical verification across approximately 4,000 AMD EPYC ™ cores to deliver overnight full-chip DRC runtime Unique elastic CPU management enabled optimal use of compute ...

Got this from SNPS - Synopsys IC Validator, Running on AMD EPYC Processor Powered Azure Virtual Machines, Verifies AMD Radeon Pro VII GPU Design in Under Nine Hours

http://stocks.us.reuters.com/stocks/keyDevelopments.asp?rpc=66&symbol=SNPS.O×tamp=20120514203000

~ Monday! $SNPS ~ Earnings posted, pending or coming soon! In Charts and Links Below!

~ $SNPS ~ Earnings expected on Monday *
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One or more of many earnings sites has alerted this security has or will be posting earnings on or around the day of this message.








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*If the earnings date is in error please ignore error. I do my best.

Synopsys, Inc. is engaged in providing technology solutions used to develop electronics and electronic systems. It supplies the electronic design automation (EDA) software that engineers use to design, create prototypes for and test integrated circuits, also known as chips. It also provides technical services to support its solutions and it help its customers develop chips and electronic systems. Its products and services are organized into four groups: Core EDA (which includes the Galaxy Design Platform, the Discovery Verification Platform and its Field Programmable Gate Array (FPGA) design products; IP and System-Level Solutions; Manufacturing Solutions and Professional Services. In September 2011, the Company acquired nSys Design Systems Private Limited (nSys). In October 2011, the Company acquired Extreme DA. In January 2012, the Company acquired ExpertIO, Inc.

http://www.google.com/finance?q=SNPS